process all elements of (unknown) records

[Duke Scarring]

Hi folks,

I want process all elements of an unknown vhdl record. The following way
did'nt work with vhdl:

--
type r_t is record
a : std_logic;
b : bit_vector(3 downto 0);
i : integer;
end record;

dont_go: process
variable v : r_t;
begin
for i in v'range loop
do_something( v.i );
end loop;
end process;
--

With this way it works, but if I enhance my record, I also have to
enhance the process:

--
is_ok: process
variable v : r_t;
begin
do_something( v.a);
do_something( v.b);
do_something( v.i);
end process;
--

Maybe anyone has an suggestion how to handle such thing sophisticated
and flexible.

Thanks,
Duke

 

[KJ]

"Duke Scarring" <duke.scarring@arcor.de> wrote in message
news:49116366$0$30236$9b4e6d93@newsspool1.arcor-online.net...

Hi folks,

I want process all elements of an unknown vhdl record. The following way
did'nt work with vhdl:

--
type r_t is record
a : std_logic;
b : bit_vector(3 downto 0);
i : integer;
end record;

dont_go: process
variable v : r_t;
begin
for i in v'range loop
do_something( v.i );
end loop;
end process;
--

With this way it works, but if I enhance my record, I also have to enhance
the process:

--
is_ok: process
variable v : r_t;
begin
do_something( v.a);
do_something( v.b);
do_something( v.i);
end process;
--

Maybe anyone has an suggestion how to handle such thing sophisticated and
flexible.

There is no way to do what you're proposing with records.

One alternative would be to arrange things as a multi-dimensional array of
some basic type. The problem there is that every element would have to be
of a size that works for all. In your example record with a std_logic, a
bit_vector(3 downto 0) and an integer, you would have to size it big enough
to handle the 32 bits of an integer. In reality though, this method really
doesn't have much appeal, because even though you've solved a method for
storing the record data that you'd like to store, in order to use the data
in a meaningful fashion you'd still have to convert the individual elements
back into the data types that are meaningful for you before you'd use them
(i.e. std_logic, a bit_vector(3 downto 0) and an integer).

Although the idea of being able to iterate through record elements has some
appeal, most of the time it is not really needed. In the example you
posted, you state "but if I enhance my record, I also have to enhance the
process" but that's not really true. If the process is doing what you want
it to do then it would not need any changes just because you added an
element to the record. The places where this would be useful though are
ones that inherently do something with every element of the record (for
example, a function/procedure that returns a string for display or writing
to a file that dumps the contents of the record for logging). But such a
function/procedure should be defined in the same package where the record is
defined. All of this should be located fairly close together in the same
file

package my_pkg is
type r_t is record
a : std_logic;
b : bit_vector(3 downto 0);
i : integer;
end record;
function Printme(x: r_t) return string;
end package my_pkg;
package body my_pkg is
function Printme(x: r_t) return string is
begin
....
end function Printme;
end package body my_pkg;

Kevin Jennings

 

On Nov 5, 4:11 am, Duke Scarring <duke.scarr...@arcor.de> wrote:

Hi folks,

I want process all elements of an unknown vhdl record. The following way
did'nt work with vhdl:

--
type r_t is record
   a : std_logic;
   b : bit_vector(3 downto 0);
   i : integer;
end record;

dont_go: process
   variable v : r_t;
begin
   for i in v'range loop
     do_something( v.i );
   end loop;
end process;
--

With this way it works, but if I enhance my record, I also have to
enhance the process:

--
is_ok: process
   variable v : r_t;
begin
   do_something( v.a);
   do_something( v.b);
   do_something( v.i);
end process;
--

Maybe anyone has an suggestion how to handle such thing sophisticated
and flexible.

Thanks,
Duke

I have wanted the same thing on many occasions, but so far (unless
VHDL-2008 adds something neat) this capability is missing in VHDL.
Part of the reason is that there are all sorts of typechecking
complexities that would arise (need to do run-time *type* checking and
have type-polymorphic variables, instead of merely run-time *subtype*
checking). Dynamic types and type polymorphism are not part of the
VHDL philosophy from what I've seen. This is not necessarily a bad
thing, though.

Your first form doesn't work because, while "range" is a type of
iterator (which is what you want), it's a scalar iterator whose exact
type has to be known (and hence stay fixed) before the loop executes.

If you want this kind of outside-the-language capability you'll
probably need to use a preprocessor or hack up a tool to build
procedure & package definitions for you from some sort of prototype.

- Kenn

 

[Tricky]

On 5 Nov, 09:11, Duke Scarring <duke.scarr...@arcor.de> wrote:

Hi folks,

I want process all elements of an unknown vhdl record. The following way
did'nt work with vhdl:

--
type r_t is record
   a : std_logic;
   b : bit_vector(3 downto 0);
   i : integer;
end record;

dont_go: process
   variable v : r_t;
begin
   for i in v'range loop
     do_something( v.i );
   end loop;
end process;
--

With this way it works, but if I enhance my record, I also have to
enhance the process:

--
is_ok: process
   variable v : r_t;
begin
   do_something( v.a);
   do_something( v.b);
   do_something( v.i);
end process;
--

Maybe anyone has an suggestion how to handle such thing sophisticated
and flexible.

Thanks,
Duke

I dont really see the time saving benefit? You would still have to
handle each element differently unless they are all the same type, and
you wanted to do the same thing with every element. So for example, if
do_something was a procedure or a funtion, you'd still have to write
an explicit function that handled the new element in an appropriate
way. But the problem with the "dont_go" process, is that you'd have a
load of functions with the same name but all an overloaded version
with the same name. I dont think this would read very well in most
code. Id rather have the function/procedure named appropriatly for
what its actually doing. (this applies if its not a function or
procedure).

 

[Brian Drummond]

On Wed, 05 Nov 2008 10:11:46 +0100, Duke Scarring
<duke.scarring@arcor.de> wrote:

Hi folks,

I want process all elements of an unknown vhdl record. The following way
did'nt work with vhdl:

--
type r_t is record
a : std_logic;
b : bit_vector(3 downto 0);
i : integer;
end record;

dont_go: process
variable v : r_t;
begin
for i in v'range loop
do_something( v.i );
end loop;
end process;
--

With this way it works, but if I enhance my record, I also have to
enhance the process:

Whichever way you do it, you need to provide an overloaded version of
"do_something" for every type which appears in the record.

Therefore "do_something" requires maintenance anyway; is it really so
bad to also maintain the process?

(If so, change strategy and find some way to use an array instead of a
record)

- Brian

 

[Jim Lewis]

Duke Scarring wrote:

Hi folks,

I want process all elements of an unknown vhdl record. The following way
did'nt work with vhdl:

--
type r_t is record
a : std_logic;
b : bit_vector(3 downto 0);
i : integer;
end record;

dont_go: process
variable v : r_t;
begin
for i in v'range loop
do_something( v.i );
end loop;
end process;
--

With this way it works, but if I enhance my record, I also have to
enhance the process:

--
is_ok: process
variable v : r_t;
begin
do_something( v.a);
do_something( v.b);
do_something( v.i);
end process;
--

Maybe anyone has an suggestion how to handle such thing sophisticated
and flexible.

Thanks,
Duke

One way to keep things generic from your calling program is to make do_something
aware of the record elements. This seems ok as it can be defined in the
same package that defines r_t. Then pass the entire record into do_something
and pass the item number you wish to access. To help with the iteration,
either define a constant (such as R_T_LENGTH) or a subtype (such as R_T_RANGE).

type r_t is record
a : std_logic;
b : bit_vector(3 downto 0);
i : integer;
end record;
constant R_T_LENGTH : integer := 3 ;
subtype R_T_RANGE is integer range 1 to 3 ;

Then your process becomes:
will_go: process
variable v : r_t;
begin
for i in R_T_RANGE loop
do_something( v, i );
end loop;
end process;

Cheers,
Jim