Please recommend a free compiler

On Tuesday, January 20, 2004 at 12:49:17 PM UTC+2, Sonoman wrote:

Hi all:
I will be using a WinXP Pro machine and I need a free verilog compiler for a
VLSI class. A friend recommended Silos verilog, but the one I found will not
run on XP, and my buddy has it on XP. Where is the XP version? So far I
have downloaded Icon verilog but not installed it yet. I want to get your
opinion on which is best since the want that was recommended I was not able
to find. Please advise.

Here is a simple design which I used with verilator.
In order to practice cpp (c++) verification benches, with system verilog DPI,
using a verilog DUT, I decided to download verilator and do some self study
exercises.

This cpp bench is based on parallel fifo. Both cases are used as simple
exercises to gain some experience with verilator.
The stimuli drive is done differently. Instead of dot notation access

http://bknpk.ddns.net/my_web/SystemC_MyFirst/verilator_pipe_fifo_dpi_gen.html

 

[Nikolaos Kavvadias]

Somebody, anyone, please stop this freakin' spammer.

Τη Σάββατο, 11 Απριλίου 2015 - 8:25:40 μ.μ. UTC+2, ο χρήστης bk...@hotmail.com έγραψε:

On Tuesday, January 20, 2004 at 12:49:17 PM UTC+2, Sonoman wrote:
Hi all:
I will be using a WinXP Pro machine and I need a free verilog compiler for a
VLSI class. A friend recommended Silos verilog, but the one I found will not
run on XP, and my buddy has it on XP. Where is the XP version? So far I
have downloaded Icon verilog but not installed it yet. I want to get your
opinion on which is best since the want that was recommended I was not able
to find. Please advise.

Here is a simple design which I used with verilator.
In order to practice cpp (c++) verification benches, with system verilog DPI,
using a verilog DUT, I decided to download verilator and do some self study
exercises.

This cpp bench is based on parallel fifo. Both cases are used as simple
exercises to gain some experience with verilator.
The stimuli drive is done differently. Instead of dot notation access

http://bknpk.ddns.net/my_web/SystemC_MyFirst/verilator_pipe_fifo_dpi_gen.html

 

[Pinhas Krengel]

On Tuesday, January 20, 2004 at 12:48:53 PM UTC+2, Sonoman wrote:

Hi all:
I will be using a WinXP Pro machine and I need a free verilog compiler for a
VLSI class. A friend recommended Silos verilog, but the one I found will not
run on XP, and my buddy has it on XP. Where is the XP version? So far I
have downloaded Icon verilog but not installed it yet. I want to get your
opinion on which is best since the want that was recommended I was not able
to find. Please advise.

Icarus
some examples with code and compilation script
"...a simple VPI program that interacts with a VERILOG code. VPI is the C-Programming interface to the Verilog HDL..."
http://bknpk.ddns.net/my_web/MiscellaneousHW/my_first_vpi.html

AHB and APB Generator VERILOG Simulation
http://bknpk.ddns.net/my_web/LEON/AHB_APB_leon/AHB_APB_verilogSIM.html

comparing performance between Icarus and GHDL (both are free simulators)
The design contains 1447 flip-flops.
The design is simulated for 1199700 ns.
All signals are recorded using VCD format
http://bknpk.ddns.net/my_web/IP_STACK/synt_post_ngd_sim_ver.html

 

[michael6866]

On Wednesday, October 21, 2015 at 1:55:54 AM UTC-4, Pinhas Krengel wrote:

On Tuesday, January 20, 2004 at 12:48:53 PM UTC+2, Sonoman wrote:
Hi all:
I will be using a WinXP Pro machine and I need a free verilog compiler for a
VLSI class. A friend recommended Silos verilog, but the one I found will not
run on XP, and my buddy has it on XP. Where is the XP version? So far I
have downloaded Icon verilog but not installed it yet. I want to get your
opinion on which is best since the want that was recommended I was not able
to find. Please advise.

Icarus
some examples with code and compilation script
"...a simple VPI program that interacts with a VERILOG code. VPI is the C-Programming interface to the Verilog HDL..."
http://bknpk.ddns.net/my_web/MiscellaneousHW/my_first_vpi.html

AHB and APB Generator VERILOG Simulation
http://bknpk.ddns.net/my_web/LEON/AHB_APB_leon/AHB_APB_verilogSIM.html

comparing performance between Icarus and GHDL (both are free simulators)
The design contains 1447 flip-flops.
The design is simulated for 1199700 ns.
All signals are recorded using VCD format
http://bknpk.ddns.net/my_web/IP_STACK/synt_post_ngd_sim_ver.html

Please stop doing this.