Phase Noise vs. Jitter

On Tue, 17 Sep 2019 08:21:32 -0000 (UTC), Cursitor Doom
<curd@notformail.com> wrote:

On Mon, 16 Sep 2019 11:25:52 -0700, John Larkin wrote:

Oh, ricky and sloman are both wrong. Jitter is a time-domain
measurement, and phase noise is frequency domain. Either can be mapped
into the other mathematically, but the units and measurement are
different.

And jitter is not just a single-period measurement. Low frequency phase
noise causes long-interval jitter.

Well, Sloman of all people I would have expected to know that, given it's
the only subject he's professed any qualification in. Perhaps he'll be
along in a minute or two to clarify what he meant. Pity I won't see it if
he does.

Yes, ignore him. He's only here to insult, in his pompous, repetitious
third-party way.

There are a few really sad cases here.

 

[John Miles, KE5FX]

On Monday, September 16, 2019 at 11:20:49 AM UTC-7, John Larkin wrote:

It surprised me that the DC output is very quiet. They must shape the
timing of the jitter, like a 2nd order delta-sigma modulator, to push
the noise spectrum up where the output filter kills it.

Caveat: something I've found with some of those SS regulators is that
they use an internal spreading clock that causes spurs at frequencies
that the FCC doesn't care about but that I do. Worth keeping in mind
if you are using a spread-spectrum regulator for purposes other than
passing CISPR...

-- john, KE5FX

 

On Tue, 17 Sep 2019 20:10:28 -0700 (PDT), "John Miles, KE5FX"
<jmiles@gmail.com> wrote:

On Monday, September 16, 2019 at 11:20:49 AM UTC-7, John Larkin wrote:
It surprised me that the DC output is very quiet. They must shape the
timing of the jitter, like a 2nd order delta-sigma modulator, to push
the noise spectrum up where the output filter kills it.

Caveat: something I've found with some of those SS regulators is that
they use an internal spreading clock that causes spurs at frequencies
that the FCC doesn't care about but that I do. Worth keeping in mind
if you are using a spread-spectrum regulator for purposes other than
passing CISPR...

-- john, KE5FX

I have a box running on my bench that uses the TPS54302. I'll check
the spectrum tomorrow.

 

[Bill Sloman]

On Wednesday, September 18, 2019 at 12:31:58 AM UTC+10, jla...@highlandsniptechnology.com wrote:

On Tue, 17 Sep 2019 08:21:32 -0000 (UTC), Cursitor Doom
curd@notformail.com> wrote:

On Mon, 16 Sep 2019 11:25:52 -0700, John Larkin wrote:

Oh, ricky and sloman are both wrong. Jitter is a time-domain
measurement, and phase noise is frequency domain. Either can be mapped
into the other mathematically, but the units and measurement are
different.

And jitter is not just a single-period measurement. Low frequency phase
noise causes long-interval jitter.

Well, Sloman of all people I would have expected to know that, given it's
the only subject he's professed any qualification in. Perhaps he'll be
along in a minute or two to clarify what he meant. Pity I won't see it if
he does.

Yes, ignore him. He's only here to insult, in his pompous, repetitious
third-party way.

John Larkin posts an insulting misapprehension of my technical contribution to the thread, and then complains that I'm only here to insult.

> There are a few really sad cases here.

And Larkin's is sadder than most.

--
Bill Sloman, Sydney

 

[John Larkin]

On Wed, 18 Sep 2019 21:13:14 +0200, Gerhard Hoffmann <dk4xp@arcor.de>
wrote:

Am 18.09.19 um 06:41 schrieb Bill Sloman:
On Wednesday, September 18, 2019 at 12:31:58 AM UTC+10, jla...@highlandsniptechnology.com wrote:
On Tue, 17 Sep 2019 08:21:32 -0000 (UTC), Cursitor Doom
curd@notformail.com> wrote:

On Mon, 16 Sep 2019 11:25:52 -0700, John Larkin wrote:

Oh, ricky and sloman are both wrong. Jitter is a time-domain
measurement, and phase noise is frequency domain. Either can be mapped
into the other mathematically, but the units and measurement are
different.

And jitter is not just a single-period measurement. Low frequency phase
noise causes long-interval jitter.

Well, Sloman of all people I would have expected to know that, given it's
the only subject he's professed any qualification in. Perhaps he'll be
along in a minute or two to clarify what he meant. Pity I won't see it if
he does.

Yes, ignore him. He's only here to insult, in his pompous, repetitious
third-party way.

John Larkin posts an insulting misapprehension of my technical contribution to the thread, and then complains that I'm only here to insult.

There are a few really sad cases here.

And Larkin's is sadder than most.


Oh, that's boring. Must be a case of unanswered love.

G.

It's certainly about rejection. Sloman wanted me to hire him, and I
didn't.

 

[Gerhard Hoffmann]

Am 18.09.19 um 06:41 schrieb Bill Sloman:

On Wednesday, September 18, 2019 at 12:31:58 AM UTC+10, jla...@highlandsniptechnology.com wrote:
On Tue, 17 Sep 2019 08:21:32 -0000 (UTC), Cursitor Doom
curd@notformail.com> wrote:

On Mon, 16 Sep 2019 11:25:52 -0700, John Larkin wrote:

Oh, ricky and sloman are both wrong. Jitter is a time-domain
measurement, and phase noise is frequency domain. Either can be mapped
into the other mathematically, but the units and measurement are
different.

And jitter is not just a single-period measurement. Low frequency phase
noise causes long-interval jitter.

Well, Sloman of all people I would have expected to know that, given it's
the only subject he's professed any qualification in. Perhaps he'll be
along in a minute or two to clarify what he meant. Pity I won't see it if
he does.

Yes, ignore him. He's only here to insult, in his pompous, repetitious
third-party way.

John Larkin posts an insulting misapprehension of my technical contribution to the thread, and then complains that I'm only here to insult.

There are a few really sad cases here.

And Larkin's is sadder than most.

Oh, that's boring. Must be a case of unanswered love.

G.

 

On Sunday, September 15, 2019 at 7:04:48 AM UTC-4, Bill Sloman wrote:

On Sunday, September 15, 2019 at 7:14:27 PM UTC+10, Cursitor Doom wrote:
On Sat, 14 Sep 2019 20:06:46 -0700, jlarkin wrote:

There's a math operation that maps one into the other, at least for
wideband noise and RMS jitter. There are several calculators online.

I don't want a mathematical explanation, though; just an intuitive one.

Something dumbed down enough for Cursitor Doom to understand.

In the telecom business, stuff below 0.1 Hz is called "wander" and
faster wiggles are "jitter."

In that case I've discovered a new phenomenon I've dubbed "twitch".

"Exe files can't be previewed" it says on your link.

Let's try re-phrasing it thus: phase noise produces sidebands. Does
jitter?

The kind of deviations from the ideal perfectly repetitive waveform that constitute phase noise, and can be characterised as jitter, show up as low level sidebands on the Fourier transform of a noisy and jittery waveform.

--
Bill Sloman, Sydney

It's difficult to get more dumbed down than the usual engineering approach with their damn graphs of "fuzzy" phasors and pulling equations out of the air full of undefined terms. See eq. 106 of section 2.110.3A etc idiocy.

 

On Tue, 17 Sep 2019 21:27:10 -0700, jlarkin@highlandsniptechnology.com
wrote:

On Tue, 17 Sep 2019 20:10:28 -0700 (PDT), "John Miles, KE5FX"
jmiles@gmail.com> wrote:

On Monday, September 16, 2019 at 11:20:49 AM UTC-7, John Larkin wrote:
It surprised me that the DC output is very quiet. They must shape the
timing of the jitter, like a 2nd order delta-sigma modulator, to push
the noise spectrum up where the output filter kills it.

Caveat: something I've found with some of those SS regulators is that
they use an internal spreading clock that causes spurs at frequencies
that the FCC doesn't care about but that I do. Worth keeping in mind
if you are using a spread-spectrum regulator for purposes other than
passing CISPR...

-- john, KE5FX

I have a box running on my bench that uses the TPS54302. I'll check
the spectrum tomorrow.

I snooped the switcher node, Rigol scope FFT and a big ole spectrum
analyzer, but neither is dramatically instructive.

https://www.dropbox.com/s/67zt446nx37o0c9/TPS54302_PWM.JPG?raw=1

https://www.dropbox.com/s/20rofrdeh22sc6r/TPS54302_FFT.JPG?raw=1

https://www.dropbox.com/s/zr1ouuipkfa3v95/TPS54302_spectrum.JPG?raw=1

 

[Bill Sloman]

On Thursday, September 19, 2019 at 5:26:34 AM UTC+10, John Larkin wrote:

On Wed, 18 Sep 2019 21:13:14 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Am 18.09.19 um 06:41 schrieb Bill Sloman:
On Wednesday, September 18, 2019 at 12:31:58 AM UTC+10, jla...@highlandsniptechnology.com wrote:
On Tue, 17 Sep 2019 08:21:32 -0000 (UTC), Cursitor Doom
curd@notformail.com> wrote:

On Mon, 16 Sep 2019 11:25:52 -0700, John Larkin wrote:

Oh, ricky and sloman are both wrong. Jitter is a time-domain
measurement, and phase noise is frequency domain. Either can be mapped
into the other mathematically, but the units and measurement are
different.

And jitter is not just a single-period measurement. Low frequency phase
noise causes long-interval jitter.

Well, Sloman of all people I would have expected to know that, given it's
the only subject he's professed any qualification in. Perhaps he'll be
along in a minute or two to clarify what he meant. Pity I won't see it if
he does.

Yes, ignore him. He's only here to insult, in his pompous, repetitious
third-party way.

John Larkin posts an insulting misapprehension of my technical contribution to the thread, and then complains that I'm only here to insult.

There are a few really sad cases here.

And Larkin's is sadder than most.


Oh, that's boring. Must be a case of unanswered love.

It's certainly about rejection. Sloman wanted me to hire him, and I
didn't.

John Larkin complained that he couldn't hire skilled help, and I pointed out that I was retired and willing to sub-contract by e-mail (which I've done, but not much).

He passed the email on to Jim Thompson, who persuaded him that it would not be a good idea, and posted a rude comment - gloating about his success - here.

This didn't endear John Larkin to me. He was welcome to reject my offer, but passing it on to Jim Thompson was decidedly bad behaviour on his part.

--
Bill Sloman, Sydney

 

On Tuesday, September 17, 2019 at 10:31:58 AM UTC-4, jla...@highlandsniptechnology.com wrote:

On Tue, 17 Sep 2019 08:21:32 -0000 (UTC), Cursitor Doom
curd@notformail.com> wrote:

On Mon, 16 Sep 2019 11:25:52 -0700, John Larkin wrote:

Oh, ricky and sloman are both wrong. Jitter is a time-domain
measurement, and phase noise is frequency domain. Either can be mapped
into the other mathematically, but the units and measurement are
different.

And jitter is not just a single-period measurement. Low frequency phase
noise causes long-interval jitter.

Well, Sloman of all people I would have expected to know that, given it's
the only subject he's professed any qualification in. Perhaps he'll be
along in a minute or two to clarify what he meant. Pity I won't see it if
he does.

Yes, ignore him. He's only here to insult, in his pompous, repetitious
third-party way.

There are a few really sad cases here.

And he recklessly repeats defamation from sources he doesn't even know. Then he lies about having communication with that source, when it's obvious that he has. He's doesn't realize he's been communicating with a pedophile, career malingerer and ne'er do well.

 

[John Miles, KE5FX]

On Wednesday, September 18, 2019 at 7:27:11 PM UTC-7,

I snooped the switcher node, Rigol scope FFT and a big ole spectrum
analyzer, but neither is dramatically instructive.

Hmm, and now I can't repro it here, either. At one point I was getting
a lot of EMI at 30 kHz (IIRC) from this setup in spread-spectrum mode:

http://www.ke5fx.com/LT8650S.gif

Of course I didn't save any plots at the time, or keep any actual notes.
Oh, well, guess it fixed itself.

-- john, KE5FX

 

[John Larkin]

On Fri, 20 Sep 2019 03:05:50 -0700 (PDT), "John Miles, KE5FX"
<jmiles@gmail.com> wrote:

On Wednesday, September 18, 2019 at 7:27:11 PM UTC-7,
I snooped the switcher node, Rigol scope FFT and a big ole spectrum
analyzer, but neither is dramatically instructive.

Hmm, and now I can't repro it here, either. At one point I was getting
a lot of EMI at 30 kHz (IIRC) from this setup in spread-spectrum mode:

http://www.ke5fx.com/LT8650S.gif

Of course I didn't save any plots at the time, or keep any actual notes.
Oh, well, guess it fixed itself.

-- john, KE5FX

My FPGA kids refuse to use enough core current to get my switcher out
of burp mode. They should compute pi to a trillion places or
something. Burp complicates the spectrum.

Here's the board.

https://www.dropbox.com/s/45i9bfmzr9b2pf5/TPlus_E2_Leds.JPG?raw=1

Seems to work first try. My big mistake was making the blue LED too
bright, but I think we'll fix that in the FPGA.

 

[Gerhard Hoffmann]

Am 20.09.19 um 19:44 schrieb John Larkin:

My FPGA kids refuse to use enough core current to get my switcher out
of burp mode. They should compute pi to a trillion places or
something. Burp complicates the spectrum.

Tell them to make a LFSR counter with 10K flipflops and toggle it with
the highest clock they have on the chip. Binary counters do not work.
There, the lowest bit takes all the power, the higher bits don't "count".

I feel somewhat guilty.

Gerhard

 

[Dave Platt]

In article <qm35pr$5c9$1@solani.org>, Gerhard Hoffmann <dk4xp@arcor.de> wrote:

My FPGA kids refuse to use enough core current to get my switcher out
of burp mode. They should compute pi to a trillion places or
something. Burp complicates the spectrum.

Tell them to make a LFSR counter with 10K flipflops and toggle it with
the highest clock they have on the chip. Binary counters do not work.
There, the lowest bit takes all the power, the higher bits don't "count".

I feel somewhat guilty.

Won't that make the test results rather random? (grins, ducks, leaves
room quickly)

 

[John Larkin]

On Fri, 20 Sep 2019 20:29:15 +0200, Gerhard Hoffmann <dk4xp@arcor.de>
wrote:

Am 20.09.19 um 19:44 schrieb John Larkin:

My FPGA kids refuse to use enough core current to get my switcher out
of burp mode. They should compute pi to a trillion places or
something. Burp complicates the spectrum.

Tell them to make a LFSR counter with 10K flipflops and toggle it with
the highest clock they have on the chip. Binary counters do not work.
There, the lowest bit takes all the power, the higher bits don't "count".

I feel somewhat guilty.

Gerhard

Period = 2^10000 - 1

One problem is to keep the compiler from optimizing out something that
has no function. The fix is to do something that is too complex for
the compiler to understand, and bring it out to a pin.

 

[Gerhard Hoffmann]

Am 20.09.19 um 22:20 schrieb John Larkin:

On Fri, 20 Sep 2019 20:29:15 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Am 20.09.19 um 19:44 schrieb John Larkin:

My FPGA kids refuse to use enough core current to get my switcher out
of burp mode. They should compute pi to a trillion places or
something. Burp complicates the spectrum.

Tell them to make a LFSR counter with 10K flipflops and toggle it with
the highest clock they have on the chip. Binary counters do not work.
There, the lowest bit takes all the power, the higher bits don't "count".

I feel somewhat guilty.

Gerhard

Period = 2^10000 - 1

One problem is to keep the compiler from optimizing out something that
has no function. The fix is to do something that is too complex for
the compiler to understand, and bring it out to a pin.

The run length does not matter. The point is that about half the FFs
toggle each clock. Having one output pin to nirvana is the easiest way
to make sure that it is not optimized away.


I once had a huge FIR-Filter after a 2's complement ADC. I switched it
ON for the first time and was pleased by the low power consumption.
After some seconds, consumption exploded. I switched it all off,
assuming that there was sth. burning off.

But no, it was just the analog ADC bias control loop doing its duty,
so the minimum noise produced alternating 00000001 and 11111111
and that was about the worst, energy-wise, for the adders and
multipliers.


Working against the Xilinx optimizer can be hard. I did a VHDL package
for a triple module redundancy replacement for std_logic,
std_logic_vector, signed etc, where the redundancy was hidden mostly
in the package. I ended up with extra input pins my_high, my_low,
my_perhaps for all of the 3 components. Clutters routing somewhat, but
it is fun to see a counter simply counting on, in spite of a dozen of
bit errors injected each cycle. Somehow like the Terminator coming
unimpressed out of the flames of a burning gas truck.
Just do not hit more than 1 FlipFlop of the same bit at the same time.

No, we did not get the Xilinx redundancy tool because of ITAR, for sth.
that will go to ISS. :-[
But my solution is now better anyway.

Gerhard

 

[Dave Platt]

In article <qm3fni$c6o$1@solani.org>, Gerhard Hoffmann <dk4xp@arcor.de> wrote:

Working against the Xilinx optimizer can be hard. I did a VHDL package
for a triple module redundancy replacement for std_logic,
std_logic_vector, signed etc, where the redundancy was hidden mostly
in the package. I ended up with extra input pins my_high, my_low,
my_perhaps for all of the 3 components.

Oh... so _you_ must be the guy who was responsible for that dreadful
shortage of 74LS12AX7 "quad maybe-gate" chips a few years ago?

If so, please know that you _totally_ messed up the parts-acquisition
schedule for a project I was working on (the embedded controller for
an updated Infinite Improbability Drive system).

 

John Larkin <jlarkin@highland_atwork_technology.com> wrote in
news:aj2aoe9c3t5a8ku36tpa52m2gtrqm6bqvs@4ax.com:

On Fri, 20 Sep 2019 03:05:50 -0700 (PDT), "John Miles, KE5FX"
jmiles@gmail.com> wrote:

On Wednesday, September 18, 2019 at 7:27:11 PM UTC-7,
I snooped the switcher node, Rigol scope FFT and a big ole
spectrum analyzer, but neither is dramatically instructive.

Hmm, and now I can't repro it here, either. At one point I was
getting a lot of EMI at 30 kHz (IIRC) from this setup in
spread-spectrum mode:

http://www.ke5fx.com/LT8650S.gif

Of course I didn't save any plots at the time, or keep any actual
notes. Oh, well, guess it fixed itself.

-- john, KE5FX

My FPGA kids refuse to use enough core current to get my switcher
out of burp mode. They should compute pi to a trillion places or
something. Burp complicates the spectrum.

Here's the board.

https://www.dropbox.com/s/45i9bfmzr9b2pf5/TPlus_E2_Leds.JPG?raw=1

Seems to work first try. My big mistake was making the blue LED
too bright, but I think we'll fix that in the FPGA.

That could just be an effect of the camera angle and that specific
LED's reflecto-dish. Or like you said... a different current limit
resistor driving it.

 

dplatt@coop.radagast.org (Dave Platt) wrote in
news:jglf5g-l9p.ln1@coop.radagast.org:

In article <qm35pr$5c9$1@solani.org>, Gerhard Hoffmann
dk4xp@arcor.de> wrote:

My FPGA kids refuse to use enough core current to get my
switcher out of burp mode. They should compute pi to a trillion
places or something. Burp complicates the spectrum.

Tell them to make a LFSR counter with 10K flipflops and toggle it
with the highest clock they have on the chip. Binary counters do
not work. There, the lowest bit takes all the power, the higher
bits don't "count".

I feel somewhat guilty.

Won't that make the test results rather random? (grins, ducks,
leaves room quickly)

You guys have just stumbled onto the world's only truly random
number generator!

 

dplatt@coop.radagast.org (Dave Platt) wrote in news:h6uf5g-ciq.ln1
@coop.radagast.org:

> Improbability

Firesign Theatre

Don't Crush That Dwarf, Hand Me The Pliers

<https://www.youtube.com/watch?v=RLZOXm3zY1w>