Phase frequency detector

D

Deepthi

Guest
I am trying to analyse the working of a conventional phase frequency
detector(NAND based).I would like to know why the deadzone is high for
it specially when the reset delay is large.Please could anyone help me
out with it atleast an article.
 
On 25 May 2004 18:09:06 -0700, raodeepthi2000@yahoo.com (Deepthi)
wrote:

I am trying to analyse the working of a conventional phase frequency
detector(NAND based).I would like to know why the deadzone is high for
it specially when the reset delay is large.Please could anyone help me
out with it atleast an article.
What IS "a conventional phase frequency detector (NAND based)"? Most
P-F Detectors are D-Flop (or equivalent latch logic) based.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
On Tue, 25 May 2004 22:10:41 -0700, Jim Thompson wrote:

On 25 May 2004 18:09:06 -0700, raodeepthi2000@yahoo.com (Deepthi)
wrote:

I am trying to analyse the working of a conventional phase frequency
detector(NAND based).I would like to know why the deadzone is high for
it specially when the reset delay is large.Please could anyone help me
out with it atleast an article.

What IS "a conventional phase frequency detector (NAND based)"? Most
P-F Detectors are D-Flop (or equivalent latch logic) based.
Didn't the Motorola PFD data sheet use only NAND gates? The schematic shown
in Gardner (2nd ed, p. 123) uses only nand gates, connected (mostly) as SR
flip-flops.

As for the dead-zone, that's another matter (and will have to wait for a
later reply).

-- Mike --
 
On Wed, 26 May 2004 08:13:51 -0700, Mike <mike@nospam.com> wrote:

On Tue, 25 May 2004 22:10:41 -0700, Jim Thompson wrote:

On 25 May 2004 18:09:06 -0700, raodeepthi2000@yahoo.com (Deepthi)
wrote:

I am trying to analyse the working of a conventional phase frequency
detector(NAND based).I would like to know why the deadzone is high for
it specially when the reset delay is large.Please could anyone help me
out with it atleast an article.

What IS "a conventional phase frequency detector (NAND based)"? Most
P-F Detectors are D-Flop (or equivalent latch logic) based.


Didn't the Motorola PFD data sheet use only NAND gates? The schematic shown
in Gardner (2nd ed, p. 123) uses only nand gates, connected (mostly) as SR
flip-flops.

As for the dead-zone, that's another matter (and will have to wait for a
later reply).

-- Mike --
Sure... "(or equivalent latch logic) based"... the "9-gate-wonder"
;-)

Gardner, p123, is missing some connections.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
Deepthi wrote:

I am trying to analyse the working of a conventional phase frequency
detector(NAND based).I would like to know why the deadzone is high for
it specially when the reset delay is large.Please could anyone help me
out with it atleast an article.
If you mean a three-state phase detector with "up", "down" and
"middling" outputs, the usual cause of a deadzone is because of
metastability. The basic construction of the phase detector uses two
clocks, so both latches can go off at the same time (giving you
simultaneous up and down). There's a circuit that detects this and
resets both latches, but it's subject to metastability. Since the
target operating point of the usual PLL is to be right at he point of
simultaneous clocking you're just asking for trouble.

Motorola advertises "special circuitry" to minimize this metastability.
IIRC they're pretty vague about exactly how they do it. Phillips uses
some sort of clever pulse-absorption circuit that causes the PLL set
point to be about 10% away from the danger zone -- it's in their
synthesizer data sheets.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com
 
Jim Thompson wrote...
Mike wrote:

Didn't the Motorola PFD data sheet use only NAND gates? The schematic
shown in Gardner (2nd ed, p. 123) uses only nand gates, connected
(mostly) as SR flip-flops.

As for the dead-zone, that's another matter (and will have to wait
for a later reply).

Sure... "(or equivalent latch logic) based"... the "9-gate-wonder"
;-)

Gardner, p123, is missing some connections.
Is the 9-gate circuit shown on the MC4044 18-page datasheet
complete? It uses six 2-input NANDs and three 3-input NANDs.

BTW, that's a very nice detailed datasheet, who wrote it?

Thanks,
- Win

(email: use hill_at_rowland-dot-org for now)
 
On 26 May 2004 10:14:05 -0700, Winfield Hill
<Winfield_member@newsguy.com> wrote:

Jim Thompson wrote...

Mike wrote:

Didn't the Motorola PFD data sheet use only NAND gates? The schematic
shown in Gardner (2nd ed, p. 123) uses only nand gates, connected
(mostly) as SR flip-flops.

As for the dead-zone, that's another matter (and will have to wait
for a later reply).

Sure... "(or equivalent latch logic) based"... the "9-gate-wonder"
;-)

Gardner, p123, is missing some connections.

Is the 9-gate circuit shown on the MC4044 18-page datasheet
complete? It uses six 2-input NANDs and three 3-input NANDs.
It is complete.

BTW, that's a very nice detailed datasheet, who wrote it?

Thanks,
- Win
Back in those days Motorola had a very good
applications/technical-writing department managed by Lothar Stern, but
Ron Treadway and I (as designers of the MC4044) worked very closely
with them to create the data sheet.

Likewise for the MC4024 (voltage-controlled multivibrator) and its ECL
equivalents (the core of the TTL version is actually ECL). I designed
the MC4024 and the ECL version (MC1658), as well as the MC1648, a
sinusoidal VCO (tank + varactor) with ECL clock outputs.

Most of these parts have been now been re-done in 12000 series PECL.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
Jim Thompson wrote...
Winfield Hill wrote:
Jim Thompson wrote...
Mike wrote:

Didn't the Motorola PFD data sheet use only NAND gates? The
schematic shown in Gardner (2nd ed, p. 123) uses only nand gates,
connected (mostly) as SR flip-flops.

As for the dead-zone, that's another matter (and will have to wait
for a later reply).

Sure... "(or equivalent latch logic) based"... the "9-gate-wonder"
;-)

Gardner, p123, is missing some connections.

Is the 9-gate circuit shown on the MC4044 18-page datasheet
complete? It uses six 2-input NANDs and three 3-input NANDs.

It is complete.

BTW, that's a very nice detailed datasheet, who wrote it?

Back in those days Motorola had a very good applications /
technical-writing department managed by Lothar Stern, but
Ron Treadway and I (as designers of the MC4044) worked very
closely with them to create the data sheet.

Likewise for the MC4024 (voltage-controlled multivibrator) and its
ECL equivalents (the core of the TTL version is actually ECL).
I designed the MC4024 and the ECL version (MC1658), as well as the
MC1648, a sinusoidal VCO (tank + varactor) with ECL clock outputs.

Most of these parts have been now been re-done in 12000 series PECL.
The MC1648 oscillator, discontinued. "Replaced" by the MC12148,
also discontinued shortly thereafter. Damn nice parts, bummer.

Thanks,
- Win

(email: use hill_at_rowland-dot-org for now)
 
On 26 May 2004 12:46:52 -0700, Winfield Hill
<Winfield_member@newsguy.com> wrote:

Jim Thompson wrote...

Winfield Hill wrote:
Jim Thompson wrote...
Mike wrote:

Didn't the Motorola PFD data sheet use only NAND gates? The
schematic shown in Gardner (2nd ed, p. 123) uses only nand gates,
connected (mostly) as SR flip-flops.

As for the dead-zone, that's another matter (and will have to wait
for a later reply).

Sure... "(or equivalent latch logic) based"... the "9-gate-wonder"
;-)

Gardner, p123, is missing some connections.

Is the 9-gate circuit shown on the MC4044 18-page datasheet
complete? It uses six 2-input NANDs and three 3-input NANDs.

It is complete.

BTW, that's a very nice detailed datasheet, who wrote it?

Back in those days Motorola had a very good applications /
technical-writing department managed by Lothar Stern, but
Ron Treadway and I (as designers of the MC4044) worked very
closely with them to create the data sheet.

Likewise for the MC4024 (voltage-controlled multivibrator) and its
ECL equivalents (the core of the TTL version is actually ECL).
I designed the MC4024 and the ECL version (MC1658), as well as the
MC1648, a sinusoidal VCO (tank + varactor) with ECL clock outputs.

Most of these parts have been now been re-done in 12000 series PECL.

The MC1648 oscillator, discontinued. "Replaced" by the MC12148,
also discontinued shortly thereafter. Damn nice parts, bummer.

Thanks,
- Win

(email: use hill_at_rowland-dot-org for now)
Follow the links on my website to Lansdale... they're making damn near
everything I ever designed.

Can't find what you want? Contact Dale Lillard
<dale[at]lans[remove-this-text]dale[dot]com>

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
Jim Thompson wrote:

On 26 May 2004 10:14:05 -0700, Winfield Hill
Winfield_member@newsguy.com> wrote:
-- snip --

Back in those days Motorola had a very good
applications/technical-writing department managed by Lothar Stern, but
Ron Treadway and I (as designers of the MC4044) worked very closely
with them to create the data sheet.

Likewise for the MC4024 (voltage-controlled multivibrator) and its ECL
equivalents (the core of the TTL version is actually ECL). I designed
the MC4024 and the ECL version (MC1658), as well as the MC1648, a
sinusoidal VCO (tank + varactor) with ECL clock outputs.

Most of these parts have been now been re-done in 12000 series PECL.

...Jim Thompson
I alluded to this in my other post -- Phase-frequency detectors like
these are reputed to have problems with metastability when the two
pulses hit at exactly the same time. Since you have a loop filter that
is working _very hard_ to make just this situation occur, what did you
have to do to prevent it from being an issue? Or was the alleviation of
this trait just left as an exercise to the reader?

I vaguely remember either the 4044 datasheet or one of the synthesizer
data sheets making some statement of cleverness in relation to fixing
this, but I can only find a 12040 datasheet today, and it tells me to
look at the 4044 for the theory!

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com
 
Jim Thompson wrote...
Winfield Hill wrote:

The MC1648 oscillator, discontinued. "Replaced" by the MC12148,
also discontinued shortly thereafter. Damn nice parts, bummer.

Follow the links on my website to Lansdale... they're making damn
near everything I ever designed.

Can't find what you want? Contact Dale Lillard
dale[at]lans[remove-this-text]dale[dot]com
Good info.

Thanks,
- Win

(email: use hill_at_rowland-dot-org for now)
 
Tim Wescott wrote...
I vaguely remember either the 4044 datasheet or one of the synthesizer
data sheets making some statement of cleverness in relation to fixing
this, but I can only find a 12040 datasheet today, and it tells me to
look at the 4044 for the theory!
I'll post it on a.b.s.e. for you (and any others who're interested).

Thanks,
- Win

(email: use hill_at_rowland-dot-org for now)
 
Winfield Hill wrote:

Tim Wescott wrote...

I vaguely remember either the 4044 datasheet or one of the synthesizer
data sheets making some statement of cleverness in relation to fixing
this, but I can only find a 12040 datasheet today, and it tells me to
look at the 4044 for the theory!


I'll post it on a.b.s.e. for you (and any others who're interested).

Thanks,
- Win

(email: use hill_at_rowland-dot-org for now)

Big file.

Thanks.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com
 
Tim Wescott wrote:

I alluded to this in my other post -- Phase-frequency detectors like
these are reputed to have problems with metastability when the two
pulses hit at exactly the same time. Since you have a loop filter that
is working _very hard_ to make just this situation occur, what did you
have to do to prevent it from being an issue? Or was the alleviation of
this trait just left as an exercise to the reader?

I vaguely remember either the 4044 datasheet or one of the synthesizer
data sheets making some statement of cleverness in relation to fixing
this, but I can only find a 12040 datasheet today, and it tells me to
look at the 4044 for the theory!
Well, I've been hit by this problem using the MC12140. It would throw
a metastibility fit a few times per second, causing little random
excursions in the PLL phase error, much like popcorn noise.
I 'solved' it by having the loop run with a small constant phase
error, injecting a small constant signal into the integral term of
the loop filter.

Jeroen Belleman
 
Tim Wescott wrote...
Winfield Hill wrote:

Tim Wescott wrote...

I vaguely remember either the 4044 datasheet or one of the synthesizer
data sheets making some statement of cleverness in relation to fixing
this, but I can only find a 12040 datasheet today, and it tells me to
look at the 4044 for the theory!

I'll post it on a.b.s.e. for you (and any others who're interested).

Big file. Thanks.
Yep, 18 chock-filled pages.

Hmm, what's chock anyway? Hmm, chokkefulle. Hmm. Nuts. Hmmmmm.

Thanks,
- Win

(email: use hill_at_rowland-dot-org for now)
 
Winfield Hill <Winfield_member@newsguy.com> wrote in message news:<c93hpu02gd0@drn.newsguy.com>...
Tim Wescott wrote...

I vaguely remember either the 4044 datasheet or one of the synthesizer
data sheets making some statement of cleverness in relation to fixing
this, but I can only find a 12040 datasheet today, and it tells me to
look at the 4044 for the theory!

I'll post it on a.b.s.e. for you (and any others who're interested).

Thanks,
- Win

(email: use hill_at_rowland-dot-org for now)
Win,

Only two files showed up at this server - parts 2 and 5. The datasheet
does not seem to be available anywhere on the web, and due to its
historical significance, I wonder if Jim would volunteer to post it on
his site?

Best Wishes

Mike
 
Mike Monett wrote...
Winfield Hill wrote ...
Tim Wescott wrote...

I vaguely remember either the 4044 datasheet or one of the synthesizer
data sheets making some statement of cleverness in relation to fixing
this, but I can only find a 12040 datasheet today, and it tells me to
look at the 4044 for the theory!

I'll post it on a.b.s.e. for you (and any others who're interested).
Ron Treadway and Jim Thompson's MC4044 - data sheet - MC4044_MC4344.pdf

Win,

Only two files showed up at this server - parts 2 and 5. The datasheet
does not seem to be available anywhere on the web, and due to its
historical significance, I wonder if Jim would volunteer to post it on
his site?
You're asking me? Anyway, yes the MC4044 has a great 18-page datasheet,
perhaps Jim will grab it from abse (or I can email it) and serve it up,
properly named so search engines can find it. Meantime, anyone wants a
copy, I'll be happy to send one (1.34MB on disk = 1.9MB attachment?),
just email me here, fixing the address, hill_at_rowland-dot-org

Thanks,
- Win

(email: use hill_at_rowland-dot-org for now)
 
On 27 May 2004 03:14:30 -0700, the renowned Winfield Hill
<Winfield_member@newsguy.com> wrote:

Tim Wescott wrote...

Winfield Hill wrote:

Tim Wescott wrote...

I vaguely remember either the 4044 datasheet or one of the synthesizer
data sheets making some statement of cleverness in relation to fixing
this, but I can only find a 12040 datasheet today, and it tells me to
look at the 4044 for the theory!

I'll post it on a.b.s.e. for you (and any others who're interested).

Big file. Thanks.

Yep, 18 chock-filled pages.

Hmm, what's chock anyway? Hmm, chokkefulle. Hmm. Nuts. Hmmmmm.
1 : a wedge or block for steadying a body (as a cask) and holding it
motionless, for filling in an unwanted space, or for blocking the
movement of a wheel

2 : a heavy metal casting (as on the bow or stern of a ship) with two
short horn-shaped arms curving inward between which ropes or hawsers
may pass for mooring or towing.



Best regards,
Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com
 
On Wed, 26 May 2004 08:26:20 -0700, Jim Thompson wrote:

On Wed, 26 May 2004 08:13:51 -0700, Mike <mike@nospam.com> wrote:

On Tue, 25 May 2004 22:10:41 -0700, Jim Thompson wrote:

On 25 May 2004 18:09:06 -0700, raodeepthi2000@yahoo.com (Deepthi)
wrote:

I am trying to analyse the working of a conventional phase frequency
detector(NAND based).I would like to know why the deadzone is high for
it specially when the reset delay is large.Please could anyone help me
out with it atleast an article.

What IS "a conventional phase frequency detector (NAND based)"? Most
P-F Detectors are D-Flop (or equivalent latch logic) based.


Didn't the Motorola PFD data sheet use only NAND gates? The schematic shown
in Gardner (2nd ed, p. 123) uses only nand gates, connected (mostly) as SR
flip-flops.

As for the dead-zone, that's another matter (and will have to wait for a
later reply).

-- Mike --

Sure... "(or equivalent latch logic) based"... the "9-gate-wonder"
;-)
DOH! I've always been able to speak in complete sentences... Maybe one of
these days I'll learn to read in complete sentences as well...

Gardner, p123, is missing some connections.
Damn... That explains everything! ;-)

(Since it's a textbook, I figured those were left "as an exercise for the
reader").

-- Mike --
 
On Thu, 27 May 2004 10:31:37 +0200, Jeroen Belleman
<nowhere@nospam.com> wrote:

Tim Wescott wrote:

I alluded to this in my other post -- Phase-frequency detectors like
these are reputed to have problems with metastability when the two
pulses hit at exactly the same time. Since you have a loop filter that
is working _very hard_ to make just this situation occur, what did you
have to do to prevent it from being an issue? Or was the alleviation of
this trait just left as an exercise to the reader?

I vaguely remember either the 4044 datasheet or one of the synthesizer
data sheets making some statement of cleverness in relation to fixing
this, but I can only find a 12040 datasheet today, and it tells me to
look at the 4044 for the theory!


Well, I've been hit by this problem using the MC12140. It would throw
a metastibility fit a few times per second, causing little random
excursions in the PLL phase error, much like popcorn noise.
I 'solved' it by having the loop run with a small constant phase
error, injecting a small constant signal into the integral term of
the loop filter.

Jeroen Belleman
You probably have some system noise problems.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 

Welcome to EDABoard.com

Sponsor

Back
Top