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5-10 mA? what's the load? I imagine current sourcesWinfield Hill wrote...
Winfield Hill wrote...
On July 31, 2019, Winfield Hill wrote:
https://www.dropbox.com/s/nednxac2bykld8q/opamp-MOSFET_current-source.pdf?dl=1
In the formulas, I assume the opamp's output
signal is controlled by Vin-Vs and R2 C2.
still checking the math ... but one formula
... gives us Zin = Vg/i3 at the MOSFET's gate.
Zin = R1 (1 + fT / f) + 1 / s C1.
Example circuit, 50mA full scale, running at 10mA.
Q1: IXTP02N120, 1.2kV, 33W Ciss 104pF, gm n=6.2,
fixed gm error: so gm = 65mS at 10mA, fT = 99MHz.
Circuit, R1 = 250 ohms, goal 10MHz BW.
Q1 gate Zin = 250*10 + j153 ohms from Ciss(10MHz).
Latter term non-material. Given high Zin, chose
R3 = 270, isolates opamp. Opamp = LT1360, 50MHz.
Chose R2 1.5k, C2 10pF for our desired 10MHz BW.
Opamp Zout 80/5 = 16 ohms. Safe margins all-round.
The above is a small-signal model. I processed it
with SPICE, response is flat to 20MHz, with 1 dB of
peaking at 65MHz, pulse response is about 5ns, with
10% overshoot. Something may be wrong, this is way
way too good. OTOH, large-signal results, including
full OFF to ON, and back, will be far slower.
Dunno if anybody's following this aspect, but there's
a goal and path to follow. Today I was able to bench
verify a 10ns IXTP02N120 step response (5mA to 10mA),
but only if Vds >= 35 volts. My simple model ignores
Coss = 10pF and Crss = 2pF at 35V. But at 5 volts,
Coss = 70pF and Crss = 50pF, which slows the current
switching to 20 to 30ns or longer.
Actually, my plan was to cascode the "signal" MOSFET
with a HV power part, running off the op-amp's Vcc
supply rail, so Vds may well be under 5 to 10 volts.
That needs to be a low-capacitance low-voltage part.
With the right parts we can keep the simple model.
--
Thanks,
- Win
That can work, though I wanted more steps, or at least more in certainOn a sunny day (Fri, 2 Aug 2019 01:08:38 +1000) it happened Chris Jones
lugnut808@spam.yahoo.com> wrote in <_fD0F.380989$4d7.71297@fx30.am4>:
On 01/08/2019 19:14, Winfield Hill wrote:
Chris Jones wrote...
If I am not restricted to using standard opamps, then my preferred
approach is to make the gate capacitance of the MOSFET be part of the
dominant pole for loop compensation.
One way to do this is to use a transconductance amplifier as the error
amplifier, and feed the error current into the gate. It works nicely on
chips, where there is no incentive to use standards op-amp designs.
On circuit boards rather than chips, the LT1228 is an option.
Here is an electronic load where I used the LT1228 to control
a MOSFET - it is a constant voltage load rather than a current
source, but the problems of driving a MOSFET gate are similar:
https://bitbucket.org/chrisgj198/projects/src/master/eload/kicad/eload1a.pdf
The more I studied your circuit, the higher my
eyebrows went. It's a pleasure to see someone
who likes using discrete MOSFETs in analog designs.
Hrm...thank you, though they discontinued the BSS83 about as soon as I
ordered the PCBs. I suspect a conspiracy. Luckily I already had stock.
Next time I could use a JFET for Q1, but I'd better pick one that I
don't like, in case they cancel that one too.
Examining your LT1228 driving an IXTN60N50L2 (a
$40 735-watt 500V SOT-227 monster MOSFET w/ bolts),
with R100 = a DNL source resistor,**
There are two source pins, well, bolts, on that MOSFET and I have no
idea why I added the R100 DNL between them - perhaps I was afraid of
some effect with the terminal inductance and wanted a placeholder for a
way to de-Q it, can't remember.
my eyebrows
peaked, when I saw a 100nF in series with 1R,
from gate to ground. Those must be compensation
components, but we're talking a slow loop here!
Yep, it's for testing solar panels on the other end of many metres of
cable. Sometimes we wanted to step through the IV curve, then sometimes
we wanted to sit on the maximum power point until the PV module reached
thermal equilibrium. The solar cells get a bit cooler when loaded
correctly rather than being left open circuit.
I did some simulations in LTSpice (also in that repository but no idea
which one is the right version!) and changed stuff until the loop seemed
not to oscillate or ring much. For comparison, most Keithley
Sourcemeters in voltage source mode don't like the capacitance of big
solar cells, and can oscillate unless you add external resistors and
capacitors.
I like the isolated mounting base on those MOSFETs, it's worth the extra
money to me. I wish someone made a copper water block just the right
size for the SOT-227 though. I made a couple, but the machining and
brazing work involved was considerable. Sadly drilling mounting holes
for the MOSFET into an existing CPU water block is likely to make a
sprinkler instead.
And then I see five 10n caps in parallel from
drain to source, plus another 1uF (!) in parallel,
plus another 1uF in series with 5R6, plus after
tiepoint, two more 1uF in parallel, sheesh!
I have designed a few electronic loads for solar panels in the past, and
this is the first one that I haven't had oscillation problems with, yet.
Oh no, that isn't true, whilst the electronic load part didn't oscillate
this time, the LM337 regulators did, because I used MLCC capacitors on
them. And the LM317s ring like a bell, though not quite oscillating they
do amplify the oscillation from the LM337s. In the end I bodged big
tantalums on there and that fixed it.
The tie point P5 was for an option to insert a power supply or battery
or charged supercapacitor, if I ever needed to test right down to zero
volts across the solar module.
** Further examination shows low-value 0R01, 0R1,
etc., current-sensing source resistors, selected
with Si4048DY MOSFET switches to the neg return.
These are innocent-looking 50-cent 30-volt MOSFETs
in so-8, but with only 8.5m-ohm of Ron at 25C.
I put two of them in anti-parallel, in series with the 10mOhm shunt, to
use the substrate diodes in the hope that it might limit the voltage and
make it harder to damage something if my code or the processor goes
silly, or if someone hooks up the solar module backwards with the
control power off.
The ADC for the current shunts likes to work at an inconvenient common
mode voltage, so the microcontroller is running off +1.6V and -0.9V.
That was a nuisance, particularly in the PCB layout. Also that micro
doesn't provide a nice (not polling) way to know when its UART has
finished sending, so disabling the TX at the right time after sending
over RS485 is inconvenient. A more convenient stand-alone ADC and then a
free choice of microcontroller might have been more sensible.
In the end I only needed to use the electronic load up to a fraction of
its intended power rating, so I don't know its true limitation. Still,
the whole thing basically worked, and fitted into a little weatherproof
box outside, and was able to use an existing supply of rather hot
glycol/water for cooling.
How about switching 8 power resistors of values
1, 2, 4 ,8, 16, 32, 64, 128 R
with the correct decreasing power rating
by some 8 power MOSFETS driven by a simple micro to get 256 steps?
Or perhaps an R2R ladder of power resistors?
No oscilililiations, big piece of iron heatsink..... like this perhaps:
http://panteltje.com/pub/big_3kg_heatsink_IMG_3745.GIF
Winfield Hill wrote...
On July 31, 2019, Winfield Hill wrote:
https://www.dropbox.com/s/nednxac2bykld8q/opamp-MOSFET_current-source.pdf?dl=1
In the formulas, I assume the opamp's output
signal is controlled by Vin-Vs and R2 C2.
still checking the math ... but one formula
... gives us Zin = Vg/i3 at the MOSFET's gate.
Zin = R1 (1 + fT / f) + 1 / s C1.
Example circuit, 50mA full scale, running at 10mA.
Q1: IXTP02N120, 1.2kV, 33W Ciss 104pF, gm n=6.2,
fixed gm error: so gm = 65mS at 10mA, fT = 99MHz.
Circuit, R1 = 250 ohms, goal 10MHz BW.
Q1 gate Zin = 250*10 + j153 ohms from Ciss(10MHz).
Latter term non-material. Given high Zin, chose
R3 = 270, isolates opamp. Opamp = LT1360, 50MHz.
Chose R2 1.5k, C2 10pF for our desired 10MHz BW.
Opamp Zout 80/5 = 16 ohms. Safe margins all-round.
The above is a small-signal model. I processed it
with SPICE, response is flat to 20MHz, with 1 dB of
peaking at 65MHz, pulse response is about 5ns, with
10% overshoot. Something may be wrong, this is way
way too good. OTOH, large-signal results, including
full OFF to ON, and back, will be far slower.
5-10 mA? what's the load? I imagine current sources
for driving coils, TECs or laser diodes on the low end.