op-amp-controlled MOSFET cucrrent-source

[Winfield Hill]

Have you seen an analysis of the classic
op-amp-controlled MOSFET current-source?
I needed this for a design, plus I'd like
to squeeze it into the x-Chapters, before
the mid-August printing deadline.

https://www.dropbox.com/s/nednxac2bykld8q/opamp-MOSFET_current-source.pdf?dl=1

In the formulas, I assume the opamp's output
signal is controlled by Vin-Vs and R2 C2.

I'm still checking the math, so won't post
the results just now, but one early formula
helps to determine the opamp's output load,
giving us Zin = Vg/i3 at the MOSFET's gate.

Zin = R1 (1 + fT / f) + 1 / s C1.

Where fT is the MOSFET's fT = gm / s Ciss.

It's high at low frequencies, as expected,
but drops toward R1 as f approaches fT, and
eventually becomes capacitive = Ciss + R1.

If R1 is low, e.g., 5 ohms for 2A pulsing,
the opamp will need help from a driver,
like an BUF634. But if it has a BUF634,
it probable won't need R2 C2 either. Hah,
I'll post an example of that scene shortly,
x-Chapters 3x.20 Precision 1.5 kV 1us Ramp.


--
Thanks,
- Win

 

[John Larkin]

On 31 Jul 2019 08:43:16 -0700, Winfield Hill <winfieldhill@yahoo.com>
wrote:

Have you seen an analysis of the classic
op-amp-controlled MOSFET current-source?
I needed this for a design, plus I'd like
to squeeze it into the x-Chapters, before
the mid-August printing deadline.

https://www.dropbox.com/s/nednxac2bykld8q/opamp-MOSFET_current-source.pdf?dl=1

In the formulas, I assume the opamp's output
signal is controlled by Vin-Vs and R2 C2.

I'm still checking the math, so won't post
the results just now, but one early formula
helps to determine the opamp's output load,
giving us Zin = Vg/i3 at the MOSFET's gate.

Zin = R1 (1 + fT / f) + 1 / s C1.

Where fT is the MOSFET's fT = gm / s Ciss.

It's high at low frequencies, as expected,
but drops toward R1 as f approaches fT, and
eventually becomes capacitive = Ciss + R1.

If R1 is low, e.g., 5 ohms for 2A pulsing,
the opamp will need help from a driver,
like an BUF634. But if it has a BUF634,
it probable won't need R2 C2 either. Hah,
I'll post an example of that scene shortly,
x-Chapters 3x.20 Precision 1.5 kV 1us Ramp.

I think that R2 can often be omittted, when R1 is high. Save half a
cent or something. That would be fun to Spice.

R3 also keeps the fet from RF oscillating on its own. I theorized that
the open-loop output impedance of the opamp would damp the fet
oscillation, and was proven wrong.

Spice models of fets never seem to demonstrate the follower
oscillation hazard. They don't often include the wire bonds.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics

 

[George Herold]

On Wednesday, July 31, 2019 at 12:14:46 PM UTC-4, John Larkin wrote:

On 31 Jul 2019 08:43:16 -0700, Winfield Hill <winfieldhill@yahoo.com
wrote:

Have you seen an analysis of the classic
op-amp-controlled MOSFET current-source?
I needed this for a design, plus I'd like
to squeeze it into the x-Chapters, before
the mid-August printing deadline.

https://www.dropbox.com/s/nednxac2bykld8q/opamp-MOSFET_current-source.pdf?dl=1

In the formulas, I assume the opamp's output
signal is controlled by Vin-Vs and R2 C2.

I'm still checking the math, so won't post
the results just now, but one early formula
helps to determine the opamp's output load,
giving us Zin = Vg/i3 at the MOSFET's gate.

Zin = R1 (1 + fT / f) + 1 / s C1.

Where fT is the MOSFET's fT = gm / s Ciss.

It's high at low frequencies, as expected,
but drops toward R1 as f approaches fT, and
eventually becomes capacitive = Ciss + R1.

If R1 is low, e.g., 5 ohms for 2A pulsing,
the opamp will need help from a driver,
like an BUF634. But if it has a BUF634,
it probable won't need R2 C2 either. Hah,
I'll post an example of that scene shortly,
x-Chapters 3x.20 Precision 1.5 kV 1us Ramp.

I think that R2 can often be omittted, when R1 is high. Save half a
cent or something. That would be fun to Spice.

When I leave R2 out, I often have problems. (I think that's true
for the NPN version of the circuit too.. but not sure.)
I do this hand-wavy R2/ C2 time constant thing... but I don't
really understand it. Maybe it's C1 that R2 is working with?

An analysis would be nice.

George H.

R3 also keeps the fet from RF oscillating on its own. I theorized that
the open-loop output impedance of the opamp would damp the fet
oscillation, and was proven wrong.

Spice models of fets never seem to demonstrate the follower
oscillation hazard. They don't often include the wire bonds.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics

 

[Winfield Hill]

bitrex wrote...

On 7/31/19 11:43 AM, Winfield Hill wrote:
Have you seen an analysis of the classic
op-amp-controlled MOSFET current-source?
I needed this for a design, plus I'd like
to squeeze it into the x-Chapters, before
the mid-August printing deadline.

https://www.dropbox.com/s/nednxac2bykld8q/opamp-MOSFET_current-source.pdf?dl=1

In the formulas, I assume the opamp's output
signal is controlled by Vin-Vs and R2 C2.

I'm still checking the math, so won't post
the results just now, but one early formula ...

I don't think the equations as written show
potential for oscillation but the circuit
definitely can at low frequency, even with
a gate stopper to damp RF self-oscillation
on the MOSFET.

I'll post the feedback-loop set of equations
later. They should give an indication. All
the elements are there, with phase shifts.
Except to simplify, I assumed the opamp GBW
is well above the R2 C2 bandwidth. That's
easy, and faster opamps usually have a higher
Iout, etc., to help it drive the MOSFET's Zin.


--
Thanks,
- Win

 

[Winfield Hill]

George Herold wrote...

On Wednesday, July 31, 2019, John Larkin wrote:
On 31 Jul 2019, Winfield Hill wrote:

Have you seen an analysis of the classic
op-amp-controlled MOSFET current-source?

I think that R2 can often be omittted,
when R1 is high. ...

When I leave R2 out, I often have problems.

Well, maybe not for high enough R1.

> An analysis would be nice.

Coming up shortly.


--
Thanks,
- Win

 

[bitrex]

On 7/31/19 11:43 AM, Winfield Hill wrote:

Have you seen an analysis of the classic
op-amp-controlled MOSFET current-source?
I needed this for a design, plus I'd like
to squeeze it into the x-Chapters, before
the mid-August printing deadline.

https://www.dropbox.com/s/nednxac2bykld8q/opamp-MOSFET_current-source.pdf?dl=1

In the formulas, I assume the opamp's output
signal is controlled by Vin-Vs and R2 C2.

I'm still checking the math, so won't post
the results just now, but one early formula
helps to determine the opamp's output load,
giving us Zin = Vg/i3 at the MOSFET's gate.

Zin = R1 (1 + fT / f) + 1 / s C1.

Where fT is the MOSFET's fT = gm / s Ciss.

It's high at low frequencies, as expected,
but drops toward R1 as f approaches fT, and
eventually becomes capacitive = Ciss + R1.

If R1 is low, e.g., 5 ohms for 2A pulsing,
the opamp will need help from a driver,
like an BUF634. But if it has a BUF634,
it probable won't need R2 C2 either. Hah,
I'll post an example of that scene shortly,
x-Chapters 3x.20 Precision 1.5 kV 1us Ramp.

It might be enlightening also to use a slightly more sophisticated
op-amp model that doesn't assume no phase shift and infinite bandwidth,
like e.g. just a GBW/s integrator, as sometimes people think "Oh hey
it's a DC current source and the op amp doesn't have to provide squat
for output current if R1 isn't that small" and then use the junkiest
LM324 they can find and don't know why their current source is
oscillating like nuts - I don't think the equations as written show
potential for oscillation but the circuit definitely can at low
frequency, even with a gate stopper to damp RF self-oscillation on the
MOSFET

 

[bitrex]

On 7/31/19 12:14 PM, John Larkin wrote:

On 31 Jul 2019 08:43:16 -0700, Winfield Hill <winfieldhill@yahoo.com
wrote:

Have you seen an analysis of the classic
op-amp-controlled MOSFET current-source?
I needed this for a design, plus I'd like
to squeeze it into the x-Chapters, before
the mid-August printing deadline.

https://www.dropbox.com/s/nednxac2bykld8q/opamp-MOSFET_current-source.pdf?dl=1

In the formulas, I assume the opamp's output
signal is controlled by Vin-Vs and R2 C2.

I'm still checking the math, so won't post
the results just now, but one early formula
helps to determine the opamp's output load,
giving us Zin = Vg/i3 at the MOSFET's gate.

Zin = R1 (1 + fT / f) + 1 / s C1.

Where fT is the MOSFET's fT = gm / s Ciss.

It's high at low frequencies, as expected,
but drops toward R1 as f approaches fT, and
eventually becomes capacitive = Ciss + R1.

If R1 is low, e.g., 5 ohms for 2A pulsing,
the opamp will need help from a driver,
like an BUF634. But if it has a BUF634,
it probable won't need R2 C2 either. Hah,
I'll post an example of that scene shortly,
x-Chapters 3x.20 Precision 1.5 kV 1us Ramp.

I think that R2 can often be omittted, when R1 is high. Save half a
cent or something. That would be fun to Spice.

R3 also keeps the fet from RF oscillating on its own. I theorized that
the open-loop output impedance of the opamp would damp the fet
oscillation, and was proven wrong.

Slew rate? the op amp in question might have the small-signal GBW to
still have a low enough (small-signal) output impedance on paper up
there to damp it but when the FET wants to oscillate it wants to swing
rail-to-rail, the op amp output stage has to have the slew rate to tame
it I think

Spice models of fets never seem to demonstrate the follower
oscillation hazard. They don't often include the wire bonds.

 

[Winfield Hill]

Jan Panteltje wrote...

Here is my version:
http://panteltje.com/panteltje/tri_pic/tritium_decay_experiment_black_box_circuit_diagram_IMG_3883.GIF

Been working OK for what's it 6 years ? now.
All calijugatiations for everything are on the same A4.
My neural net designed it.

Sorry, I can't read the part values.


--
Thanks,
- Win

 

[Jan Panteltje]

On a sunny day (31 Jul 2019 10:40:58 -0700) it happened Winfield Hill
<winfieldhill@yahoo.com> wrote in <qhsjra0p7a@drn.newsguy.com>:

George Herold wrote...

On Wednesday, July 31, 2019, John Larkin wrote:
On 31 Jul 2019, Winfield Hill wrote:

Have you seen an analysis of the classic
op-amp-controlled MOSFET current-source?

I think that R2 can often be omittted,
when R1 is high. ...

When I leave R2 out, I often have problems.

Well, maybe not for high enough R1.

An analysis would be nice.

Coming up shortly.

Here is my version:
http://panteltje.com/panteltje/tri_pic/tritium_decay_experiment_black_box_circuit_diagram_IMG_3883.GIF

Been working OK for what's it 6 years ? now.
All calijugatiations for everything are on the same A4.
My neural net designed it.
Zorry

http://panteltje.com/panteltje/tri_pic/

 

[Jan Panteltje]

On a sunny day (31 Jul 2019 11:18:25 -0700) it happened Winfield Hill
<winfieldhill@yahoo.com> wrote in <qhsm1h0ruo@drn.newsguy.com>:

Jan Panteltje wrote...

Here is my version:
http://panteltje.com/panteltje/tri_pic/tritium_decay_experiment_black_box_circuit_diagram_IMG_3883.GIF

Been working OK for what's it 6 years ? now.
All calijugatiations for everything are on the same A4.
My neural net designed it.

Sorry, I can't read the part values.

Fair enough, neither could I,
so I looked at the PICTURE
http://panteltje.com/panteltje/tri_pic/tritium_decay_experiment_black_box_electronics_top_view_IMG_3873.GIF

that showed me the caps are indeed all 1 uF and the opamp drive is via 470k 120K (that is a lowpass for PWM from a PIC BTW)
but the IRLZ34N is on the back with the gate resistor and feedback resistor
so still did not know.
From Jan Panteltje's handwriting I think the gate - as well as the feedback resistor from the current sense resistor to the opamp
is also 100 kOhm.
One would think the gate resistor to be 10O Ohm, but looks like it is 100 k,
forms a nice lowpass with the gate capacitance, also note drain is decoupled with 1 uF
to ground, preventing oscililililations.

Neural net was right

Once your job will be taken over by AI you will see more and more of these solutions.
No questions asked, no explanations given, NN uses what is in the junkbox, or the resistors at hand.

<click he if this answer was helpful>
<click here if in despair>
Press power or reset button on PC to remove this text.

 

[Winfield Hill]

Jan Panteltje wrote...

On 31 Jul 2019, Winfield Hill wrote
Jan Panteltje wrote...

Here is my version:

Sorry, I can't read the part values.

Fair enough, neither could I, so I looked
at the PICTURE
http://panteltje.com/panteltje/tri_pic/tritium_decay_experiment_black_box_electronics_top_view_IMG_3873.GIF

that showed me the caps are indeed all 1 uF
and the opamp drive is via 470k 120K (that
is a lowpass for PWM from a PIC BTW) but
the IRLZ34N is on the back with the gate
resistor and feedback resistor so still did
not know. From Jan Panteltje's handwriting
I think the gate - as well as the feedback
resistor from the current sense resistor to
the opamp is also 100 kOhm. [ snip ]

This is a good place to explain my goal for
the nodal analysis formulas. It's very easy
to design the circuits with the R2 C2 parts,
and folks have been doing it for decades.
But I want to push the limits, make 'em as
fast as I possible, even at low currents.
For that, it'd be useful to design, predict
rather than depend on experimenting.


--
Thanks,
- Win

 

[George Herold]

On Wednesday, July 31, 2019 at 4:02:08 PM UTC-4, Winfield Hill wrote:

Jan Panteltje wrote...

On 31 Jul 2019, Winfield Hill wrote
Jan Panteltje wrote...

Here is my version:

Sorry, I can't read the part values.

Fair enough, neither could I, so I looked
at the PICTURE
http://panteltje.com/panteltje/tri_pic/tritium_decay_experiment_black_box_electronics_top_view_IMG_3873.GIF

that showed me the caps are indeed all 1 uF
and the opamp drive is via 470k 120K (that
is a lowpass for PWM from a PIC BTW) but
the IRLZ34N is on the back with the gate
resistor and feedback resistor so still did
not know. From Jan Panteltje's handwriting
I think the gate - as well as the feedback
resistor from the current sense resistor to
the opamp is also 100 kOhm. [ snip ]

This is a good place to explain my goal for
the nodal analysis formulas. It's very easy
to design the circuits with the R2 C2 parts,
and folks have been doing it for decades.
But I want to push the limits, make 'em as
fast as I possible, even at low currents.
For that, it'd be useful to design, predict
rather than depend on experimenting.
Well both for me.. (I'm 1/2 hack.)

Maybe it's an (R3+R2)*C1 time constant vs.
R-out of opamp and C2.

George H.

--
Thanks,
- Win

 

[Winfield Hill]

George Herold wrote...

On July 31, 2019, Winfield Hill wrote:

https://www.dropbox.com/s/nednxac2bykld8q/opamp-MOSFET_current-source.pdf?dl=1

In the formulas, I assume the opamp's output
signal is controlled by Vin-Vs and R2 C2.

still checking the math ... but one formula
... gives us Zin = Vg/i3 at the MOSFET's gate.

Zin = R1 (1 + fT / f) + 1 / s C1.

This is a good place to explain my goal for
the nodal analysis formulas. It's very easy
to design the circuits with the R2 C2 parts,
and folks have been doing it for decades.
But I want to push the limits, make 'em as
fast as I possible, even at low currents.
For that, it'd be useful to design, predict
rather than depend on experimenting.

Well both for me.. (I'm 1/2 hack.)

Maybe it's an (R3+R2)*C1 time constant vs.
R-out of opamp and C2.

Hmm, I didn't model the opamp's Rout. Important,
but dramatically reduced by good opamp fT, with
R2 C2 feedback, to well below R3, let's check:

Example circuit, 50mA full scale, running at 10mA.
Q1: IXTP02N120, 1.2kV, 33W Ciss 104pF, gm n=6.2,
fT 38MHz. Circuit, R1 = 250 ohms, goal 10MHz BW.

Q1 gate Zin = 250*3.8 + j153 ohms from Ciss(10MHz).
Latter term non-material. Given high Zin, chose
R3 = 270, isolates opamp. Opamp = LT1360, 50MHz.
Chose R2 1.5k, C2 10pF for our desired 10MHz BW.
Opamp Zout 80/5 = 16 ohms. Safe margins all-round.


--
Thanks,
- Win

 

[Chris Jones]

On 01/08/2019 01:43, Winfield Hill wrote:

Have you seen an analysis of the classic
op-amp-controlled MOSFET current-source?
I needed this for a design, plus I'd like
to squeeze it into the x-Chapters, before
the mid-August printing deadline.

https://www.dropbox.com/s/nednxac2bykld8q/opamp-MOSFET_current-source.pdf?dl=1

In the formulas, I assume the opamp's output
signal is controlled by Vin-Vs and R2 C2.

I'm still checking the math, so won't post
the results just now, but one early formula
helps to determine the opamp's output load,
giving us Zin = Vg/i3 at the MOSFET's gate.

Zin = R1 (1 + fT / f) + 1 / s C1.

Where fT is the MOSFET's fT = gm / s Ciss.

It's high at low frequencies, as expected,
but drops toward R1 as f approaches fT, and
eventually becomes capacitive = Ciss + R1.

If R1 is low, e.g., 5 ohms for 2A pulsing,
the opamp will need help from a driver,
like an BUF634. But if it has a BUF634,
it probable won't need R2 C2 either. Hah,
I'll post an example of that scene shortly,
x-Chapters 3x.20 Precision 1.5 kV 1us Ramp.

If I am not restricted to using standard opamps, then my preferred
approach is to make the gate capacitance of the MOSFET be part of the
dominant pole for loop compensation.

One way to do this is to use a transconductance amplifier as the error
amplifier, and feed the error current into the gate. It works nicely on
chips, where there is no incentive to use standards op-amp designs.

On circuit boards rather than chips, the LT1228 is an option.

Here is an electronic load where I used the LT1228 to control a MOSFET -
it is a constant voltage load rather than a current source, but the
problems of driving a MOSFET gate are similar:
https://bitbucket.org/chrisgj198/projects/src/master/eload/kicad/eload1a.pdf

 

[Winfield Hill]

Chris Jones wrote...

If I am not restricted to using standard opamps, then my preferred
approach is to make the gate capacitance of the MOSFET be part of the
dominant pole for loop compensation.

One way to do this is to use a transconductance amplifier as the error
amplifier, and feed the error current into the gate. It works nicely on
chips, where there is no incentive to use standards op-amp designs.

On circuit boards rather than chips, the LT1228 is an option.

Here is an electronic load where I used the LT1228 to control
a MOSFET - it is a constant voltage load rather than a current
source, but the problems of driving a MOSFET gate are similar:
https://bitbucket.org/chrisgj198/projects/src/master/eload/kicad/eload1a.pdf

The more I studied your circuit, the higher my
eyebrows went. It's a pleasure to see someone
who likes using discrete MOSFETs in analog designs.

Examining your LT1228 driving an IXTN60N50L2 (a
$40 735-watt 500V SOT-227 monster MOSFET w/ bolts),
with R100 = a DNL source resistor,** my eyebrows
peaked, when I saw a 100nF in series with 1R,
from gate to ground. Those must be compensation
components, but we're talking a slow loop here!
And then I see five 10n caps in parallel from
drain to source, plus another 1uF (!) in parallel,
plus another 1uF in series with 5R6, plus after
tiepoint, two more 1uF in parallel, sheesh!

** Further examination shows low-value 0R01, 0R1,
etc., current-sensing source resistors, selected
with Si4048DY MOSFET switches to the neg return.
These are innocent-looking 50-cent 30-volt MOSFETs
in so-8, but with only 8.5m-ohm of Ron at 25C.


--
Thanks,
- Win

 

[Winfield Hill]

Winfield Hill wrote...

George Herold wrote...
On July 31, 2019, Winfield Hill wrote:

https://www.dropbox.com/s/nednxac2bykld8q/opamp-MOSFET_current-source.pdf?dl=1

In the formulas, I assume the opamp's output
signal is controlled by Vin-Vs and R2 C2.

still checking the math ... but one formula
... gives us Zin = Vg/i3 at the MOSFET's gate.

Zin = R1 (1 + fT / f) + 1 / s C1.

This is a good place to explain my goal for
the nodal analysis formulas. It's very easy
to design the circuits with the R2 C2 parts,
and folks have been doing it for decades.
But I want to push the limits, make 'em as
fast as I possible, even at low currents.
For that, it'd be useful to design, predict
rather than depend on experimenting.

Well both for me.. (I'm 1/2 hack.)

Maybe it's an (R3+R2)*C1 time constant vs.
R-out of opamp and C2.

Hmm, I didn't model the opamp's Rout. Important,
but dramatically reduced by good opamp fT, with
R2 C2 feedback, to well below R3, let's check:

Example circuit, 50mA full scale, running at 10mA.
Q1: IXTP02N120, 1.2kV, 33W Ciss 104pF, gm n=6.2,
fixed gm error: so gm = 65mS at 10mA, fT = 99MHz.
Circuit, R1 = 250 ohms, goal 10MHz BW.

Q1 gate Zin = 250*10 + j153 ohms from Ciss(10MHz).
Latter term non-material. Given high Zin, chose
R3 = 270, isolates opamp. Opamp = LT1360, 50MHz.
Chose R2 1.5k, C2 10pF for our desired 10MHz BW.
Opamp Zout 80/5 = 16 ohms. Safe margins all-round.

The above is a small-signal model. I processed it
with SPICE, response is flat to 20MHz, with 1 dB of
peaking at 65MHz, pulse response is about 5ns, with
10% overshoot. Something may be wrong, this is way
way too good. OTOH, large-signal results, including
full OFF to ON, and back, will be far slower.


--
Thanks,
- Win

 

[speff]

On Wednesday, 31 July 2019 11:43:28 UTC-4, Winfield Hill wrote:

Have you seen an analysis of the classic
op-amp-controlled MOSFET current-source?
I needed this for a design, plus I'd like
to squeeze it into the x-Chapters, before
the mid-August printing deadline.

https://www.dropbox.com/s/nednxac2bykld8q/opamp-MOSFET_current-source.pdf?dl=1

In the formulas, I assume the opamp's output
signal is controlled by Vin-Vs and R2 C2.

I'm still checking the math, so won't post
the results just now, but one early formula
helps to determine the opamp's output load,
giving us Zin = Vg/i3 at the MOSFET's gate.

Zin = R1 (1 + fT / f) + 1 / s C1.

Where fT is the MOSFET's fT = gm / s Ciss.

It's high at low frequencies, as expected,
but drops toward R1 as f approaches fT, and
eventually becomes capacitive = Ciss + R1.

If R1 is low, e.g., 5 ohms for 2A pulsing,
the opamp will need help from a driver,
like an BUF634. But if it has a BUF634,
it probable won't need R2 C2 either. Hah,
I'll post an example of that scene shortly,
x-Chapters 3x.20 Precision 1.5 kV 1us Ramp.


--
Thanks,
- Win

Op-amp output resistance (something like 100 ohms) and
the Miller effect capacitance when the load is not a short...

--Spehro Pefhany

 

[Jan Panteltje]

On a sunny day (Fri, 2 Aug 2019 01:08:38 +1000) it happened Chris Jones
<lugnut808@spam.yahoo.com> wrote in <_fD0F.380989$4d7.71297@fx30.am4>:

On 01/08/2019 19:14, Winfield Hill wrote:
Chris Jones wrote...

If I am not restricted to using standard opamps, then my preferred
approach is to make the gate capacitance of the MOSFET be part of the
dominant pole for loop compensation.

One way to do this is to use a transconductance amplifier as the error
amplifier, and feed the error current into the gate. It works nicely on
chips, where there is no incentive to use standards op-amp designs.

On circuit boards rather than chips, the LT1228 is an option.

Here is an electronic load where I used the LT1228 to control
a MOSFET - it is a constant voltage load rather than a current
source, but the problems of driving a MOSFET gate are similar:
https://bitbucket.org/chrisgj198/projects/src/master/eload/kicad/eload1a.pdf

The more I studied your circuit, the higher my
eyebrows went. It's a pleasure to see someone
who likes using discrete MOSFETs in analog designs.
Hrm...thank you, though they discontinued the BSS83 about as soon as I
ordered the PCBs. I suspect a conspiracy. Luckily I already had stock.
Next time I could use a JFET for Q1, but I'd better pick one that I
don't like, in case they cancel that one too.

Examining your LT1228 driving an IXTN60N50L2 (a
$40 735-watt 500V SOT-227 monster MOSFET w/ bolts),
with R100 = a DNL source resistor,**
There are two source pins, well, bolts, on that MOSFET and I have no
idea why I added the R100 DNL between them - perhaps I was afraid of
some effect with the terminal inductance and wanted a placeholder for a
way to de-Q it, can't remember.

my eyebrows
peaked, when I saw a 100nF in series with 1R,
from gate to ground. Those must be compensation
components, but we're talking a slow loop here!
Yep, it's for testing solar panels on the other end of many metres of
cable. Sometimes we wanted to step through the IV curve, then sometimes
we wanted to sit on the maximum power point until the PV module reached
thermal equilibrium. The solar cells get a bit cooler when loaded
correctly rather than being left open circuit.

I did some simulations in LTSpice (also in that repository but no idea
which one is the right version!) and changed stuff until the loop seemed
not to oscillate or ring much. For comparison, most Keithley
Sourcemeters in voltage source mode don't like the capacitance of big
solar cells, and can oscillate unless you add external resistors and
capacitors.

I like the isolated mounting base on those MOSFETs, it's worth the extra
money to me. I wish someone made a copper water block just the right
size for the SOT-227 though. I made a couple, but the machining and
brazing work involved was considerable. Sadly drilling mounting holes
for the MOSFET into an existing CPU water block is likely to make a
sprinkler instead.

And then I see five 10n caps in parallel from
drain to source, plus another 1uF (!) in parallel,
plus another 1uF in series with 5R6, plus after
tiepoint, two more 1uF in parallel, sheesh!
I have designed a few electronic loads for solar panels in the past, and
this is the first one that I haven't had oscillation problems with, yet.
Oh no, that isn't true, whilst the electronic load part didn't oscillate
this time, the LM337 regulators did, because I used MLCC capacitors on
them. And the LM317s ring like a bell, though not quite oscillating they
do amplify the oscillation from the LM337s. In the end I bodged big
tantalums on there and that fixed it.

The tie point P5 was for an option to insert a power supply or battery
or charged supercapacitor, if I ever needed to test right down to zero
volts across the solar module.

** Further examination shows low-value 0R01, 0R1,
etc., current-sensing source resistors, selected
with Si4048DY MOSFET switches to the neg return.
These are innocent-looking 50-cent 30-volt MOSFETs
in so-8, but with only 8.5m-ohm of Ron at 25C.

I put two of them in anti-parallel, in series with the 10mOhm shunt, to
use the substrate diodes in the hope that it might limit the voltage and
make it harder to damage something if my code or the processor goes
silly, or if someone hooks up the solar module backwards with the
control power off.

The ADC for the current shunts likes to work at an inconvenient common
mode voltage, so the microcontroller is running off +1.6V and -0.9V.
That was a nuisance, particularly in the PCB layout. Also that micro
doesn't provide a nice (not polling) way to know when its UART has
finished sending, so disabling the TX at the right time after sending
over RS485 is inconvenient. A more convenient stand-alone ADC and then a
free choice of microcontroller might have been more sensible.

In the end I only needed to use the electronic load up to a fraction of
its intended power rating, so I don't know its true limitation. Still,
the whole thing basically worked, and fitted into a little weatherproof
box outside, and was able to use an existing supply of rather hot
glycol/water for cooling.

How about switching 8 power resistors of values
1, 2, 4 ,8, 16, 32, 64, 128 R
with the correct decreasing power rating
by some 8 power MOSFETS driven by a simple micro to get 256 steps?
Or perhaps an R2R ladder of power resistors?
No oscilililiations, big piece of iron heatsink..... like this perhaps:
http://panteltje.com/pub/big_3kg_heatsink_IMG_3745.GIF

 

[Chris Jones]

On 01/08/2019 19:14, Winfield Hill wrote:

Chris Jones wrote...

If I am not restricted to using standard opamps, then my preferred
approach is to make the gate capacitance of the MOSFET be part of the
dominant pole for loop compensation.

One way to do this is to use a transconductance amplifier as the error
amplifier, and feed the error current into the gate. It works nicely on
chips, where there is no incentive to use standards op-amp designs.

On circuit boards rather than chips, the LT1228 is an option.

Here is an electronic load where I used the LT1228 to control
a MOSFET - it is a constant voltage load rather than a current
source, but the problems of driving a MOSFET gate are similar:
https://bitbucket.org/chrisgj198/projects/src/master/eload/kicad/eload1a.pdf

The more I studied your circuit, the higher my
eyebrows went. It's a pleasure to see someone
who likes using discrete MOSFETs in analog designs.

Hrm...thank you, though they discontinued the BSS83 about as soon as I
ordered the PCBs. I suspect a conspiracy. Luckily I already had stock.
Next time I could use a JFET for Q1, but I'd better pick one that I
don't like, in case they cancel that one too.

Examining your LT1228 driving an IXTN60N50L2 (a
$40 735-watt 500V SOT-227 monster MOSFET w/ bolts),
with R100 = a DNL source resistor,**

There are two source pins, well, bolts, on that MOSFET and I have no
idea why I added the R100 DNL between them - perhaps I was afraid of
some effect with the terminal inductance and wanted a placeholder for a
way to de-Q it, can't remember.

my eyebrows
peaked, when I saw a 100nF in series with 1R,
from gate to ground. Those must be compensation
components, but we're talking a slow loop here!

Yep, it's for testing solar panels on the other end of many metres of
cable. Sometimes we wanted to step through the IV curve, then sometimes
we wanted to sit on the maximum power point until the PV module reached
thermal equilibrium. The solar cells get a bit cooler when loaded
correctly rather than being left open circuit.

I did some simulations in LTSpice (also in that repository but no idea
which one is the right version!) and changed stuff until the loop seemed
not to oscillate or ring much. For comparison, most Keithley
Sourcemeters in voltage source mode don't like the capacitance of big
solar cells, and can oscillate unless you add external resistors and
capacitors.

I like the isolated mounting base on those MOSFETs, it's worth the extra
money to me. I wish someone made a copper water block just the right
size for the SOT-227 though. I made a couple, but the machining and
brazing work involved was considerable. Sadly drilling mounting holes
for the MOSFET into an existing CPU water block is likely to make a
sprinkler instead.

And then I see five 10n caps in parallel from
drain to source, plus another 1uF (!) in parallel,
plus another 1uF in series with 5R6, plus after
tiepoint, two more 1uF in parallel, sheesh!

I have designed a few electronic loads for solar panels in the past, and
this is the first one that I haven't had oscillation problems with, yet.
Oh no, that isn't true, whilst the electronic load part didn't oscillate
this time, the LM337 regulators did, because I used MLCC capacitors on
them. And the LM317s ring like a bell, though not quite oscillating they
do amplify the oscillation from the LM337s. In the end I bodged big
tantalums on there and that fixed it.

The tie point P5 was for an option to insert a power supply or battery
or charged supercapacitor, if I ever needed to test right down to zero
volts across the solar module.

** Further examination shows low-value 0R01, 0R1,
etc., current-sensing source resistors, selected
with Si4048DY MOSFET switches to the neg return.
These are innocent-looking 50-cent 30-volt MOSFETs
in so-8, but with only 8.5m-ohm of Ron at 25C.

I put two of them in anti-parallel, in series with the 10mOhm shunt, to
use the substrate diodes in the hope that it might limit the voltage and
make it harder to damage something if my code or the processor goes
silly, or if someone hooks up the solar module backwards with the
control power off.

The ADC for the current shunts likes to work at an inconvenient common
mode voltage, so the microcontroller is running off +1.6V and -0.9V.
That was a nuisance, particularly in the PCB layout. Also that micro
doesn't provide a nice (not polling) way to know when its UART has
finished sending, so disabling the TX at the right time after sending
over RS485 is inconvenient. A more convenient stand-alone ADC and then a
free choice of microcontroller might have been more sensible.

In the end I only needed to use the electronic load up to a fraction of
its intended power rating, so I don't know its true limitation. Still,
the whole thing basically worked, and fitted into a little weatherproof
box outside, and was able to use an existing supply of rather hot
glycol/water for cooling.

 

[George Herold]

On Thursday, August 1, 2019 at 10:08:27 AM UTC-4, speff wrote:

On Wednesday, 31 July 2019 11:43:28 UTC-4, Winfield Hill wrote:
Have you seen an analysis of the classic
op-amp-controlled MOSFET current-source?
I needed this for a design, plus I'd like
to squeeze it into the x-Chapters, before
the mid-August printing deadline.

https://www.dropbox.com/s/nednxac2bykld8q/opamp-MOSFET_current-source.pdf?dl=1

In the formulas, I assume the opamp's output
signal is controlled by Vin-Vs and R2 C2.

I'm still checking the math, so won't post
the results just now, but one early formula
helps to determine the opamp's output load,
giving us Zin = Vg/i3 at the MOSFET's gate.

Zin = R1 (1 + fT / f) + 1 / s C1.

Where fT is the MOSFET's fT = gm / s Ciss.

It's high at low frequencies, as expected,
but drops toward R1 as f approaches fT, and
eventually becomes capacitive = Ciss + R1.

If R1 is low, e.g., 5 ohms for 2A pulsing,
the opamp will need help from a driver,
like an BUF634. But if it has a BUF634,
it probable won't need R2 C2 either. Hah,
I'll post an example of that scene shortly,
x-Chapters 3x.20 Precision 1.5 kV 1us Ramp.


--
Thanks,
- Win

Op-amp output resistance (something like 100 ohms) and
the Miller effect capacitance when the load is not a short...

--Spehro Pefhany

The Miller effect in the Fet? Gate-drain capacitance? ... boosted by gain
of fet?

George H.