R
rickman
Guest
On 7/1/2013 7:09 AM, David Brown wrote:
there are lots of downsides too. The real issue is that it doesn't
solve any of the problems PCs are facing. The drivers might be a little
smaller, but they are still orders of magnitude bigger and slower than
staying on chip. How fast does level 1 cache run? At the processor
clock speed in all cases I've seen. Level 2 is a bit slower and I think
the main difference between level 2 and level 3 is not the speed, but
the complexity of the management (correct me if I am wrong). So even
level 3 cache runs at half the speed of the CPU or at minimum over a
GHz. Going off the die you won't get that sort of speed and you still
have the same SI issues of boards (like ground bounce) even if they
aren't as pronounced.
TI produced a version of their cell phone ARM chip which has the memory
chip soldered directly on top. That would be very close to a multichip
module. I don't know how popular it ended up being. They used it on
the BeagleBoard but I think for most apps and assembly houses this is
just *too* fancy.
Multichip modules just plain cost too much for most uses.
memory? There are numerous reasons why this is a bad idea, even if they
are still separate chips. But that may change as requirements change.
Who knows? In the portable market there does seem to be a fat sweet
spot in the center of memory sizes where you could get by with a single
memory size. We may see a multichip module for that some day... but not
until it is actually solving some problem you can't get around using
separate packages.
--
Rick
Yes, there are some advantages to combining die within a package, butOn 01/07/13 09:07, rickman wrote:
On 7/1/2013 2:51 AM, glen herrmannsfeldt wrote:
rickman<gnuarm@gmail.com> wrote:
(snip)
The only fly in the ointment is that it isn't practical to combine an
x86 CPU with 4 GB of DRAM on a single chip. Oh well, otherwise a great
idea. That might be practical in another 5 years when low end computers
are commonly using more than 16 GB of DRAM on the board.
OK, but how about 4G of DRAM off chip, but in the same package.
Maybe call it L4 cache instead of DRAM. Use a high interleave so
you can keep the access rate up, and besides the cost of the wiring
isn't so high as it would be outside the package.
How is that any real advantage? Once you go off chip you have suffered
the slings and arrows of outrageous output drivers.
Making separate chips and putting them in the same package is the golden
middle road here. You need output drivers - but you don't need the same
sort of drivers as for separate chips on a motherboard. There are
several differences - your wires are shorter (so less noise, better
margins, easier timing, lower currents, lower power), you can have many
more wires (broader paths means higher bandwidth), and you have
dedicated links (better timing, easier termination, separate datapaths
for each direction). It is particularly beneficial if the die are
stacked vertically rather than horizontally - your inter-chip
connections are minimal length, it's (relatively) easy to have huge
parallel buses, and you can arrange the layout as you want.
there are lots of downsides too. The real issue is that it doesn't
solve any of the problems PCs are facing. The drivers might be a little
smaller, but they are still orders of magnitude bigger and slower than
staying on chip. How fast does level 1 cache run? At the processor
clock speed in all cases I've seen. Level 2 is a bit slower and I think
the main difference between level 2 and level 3 is not the speed, but
the complexity of the management (correct me if I am wrong). So even
level 3 cache runs at half the speed of the CPU or at minimum over a
GHz. Going off the die you won't get that sort of speed and you still
have the same SI issues of boards (like ground bounce) even if they
aren't as pronounced.
TI produced a version of their cell phone ARM chip which has the memory
chip soldered directly on top. That would be very close to a multichip
module. I don't know how popular it ended up being. They used it on
the BeagleBoard but I think for most apps and assembly houses this is
just *too* fancy.
Multichip modules just plain cost too much for most uses.
Do you know of anyone currently working to combine the CPU and mainThere is significant work being done in making chip packaging and driver
types for exactly this sort of arrangement. It is perhaps more aimed at
portable devices rather than big systems, but the idea is the same.
memory? There are numerous reasons why this is a bad idea, even if they
are still separate chips. But that may change as requirements change.
Who knows? In the portable market there does seem to be a fat sweet
spot in the center of memory sizes where you could get by with a single
memory size. We may see a multichip module for that some day... but not
until it is actually solving some problem you can't get around using
separate packages.
--
Rick