Mixed-signal simulation speed-up with Cadence

[Alexey Borodenkov]

Hi all!

I've been designing a multi-bit sigma-delta modulator and now I am
testing its performance with Element Selection Logic (modified Data
Weighted Averaging (DWA) in my case). The circuits in the DWA are
digital - log shifter, counter, regs etc. Right now I have added just
the 16-bit log shifter to the schematics (the only part of DWA that is
in the feedback signal path). However the simulation time in Spectre
has increase dramatically - from 8 to 15 hours for 2.5k points.

I've heard from Mentor Graphics that it is possible to separate
digital and analog parts in ELDO and use different precision for them,
thus speeding up the simulations. Is it possible to do something like
that with Cadence tools??
Or maybe it would be reasonable to use AHDL models for digital parts??

A more general question - are there any ways for fast simulations of
sigma-delta loops?? I have read Ken Kundert's paper at
www.designers-guide.com about noise estimation of modulator using
SpectreRF PSS techniques, but as far as I understood, this methodology
can only estimate the noise floor in the output PSD due to devices
noise and not harmonic distortion. For me it is important to see THD
and SFDR because of input switches non-linearity.

 

[Partha]

You can do many different wonderful things with Cadence's Ultrasim
simulator. It is a fastmos simulator. This handles different accuracy
/ simulation speed tradeoff levels, uses a table based look up
algorithm, and also circuits could be selectively partitioned using
the Hierarchy editor. This could be driven to spice (spectre) like
accuracy trading off on speed, or selectively circuit blocks could be
given different accuracy levels.

Also this gels well into Cadence Analog Design Environment as just
another simulator option. We have seen 10:1 speed difference with
spectre with reasonable trade off on accuracy.

We have also evaluated this simulator with a another competing fastmos
simulator and found this to be better by a long way..

Partha


borodenkov@hotmail.com (Alexey Borodenkov) wrote in message news:<c2e6dd86.0404090526.79f6af4f@posting.google.com>...

Hi all!

I've been designing a multi-bit sigma-delta modulator and now I am
testing its performance with Element Selection Logic (modified Data
Weighted Averaging (DWA) in my case). The circuits in the DWA are
digital - log shifter, counter, regs etc. Right now I have added just
the 16-bit log shifter to the schematics (the only part of DWA that is
in the feedback signal path). However the simulation time in Spectre
has increase dramatically - from 8 to 15 hours for 2.5k points.

I've heard from Mentor Graphics that it is possible to separate
digital and analog parts in ELDO and use different precision for them,
thus speeding up the simulations. Is it possible to do something like
that with Cadence tools??
Or maybe it would be reasonable to use AHDL models for digital parts??

A more general question - are there any ways for fast simulations of
sigma-delta loops?? I have read Ken Kundert's paper at
www.designers-guide.com about noise estimation of modulator using
SpectreRF PSS techniques, but as far as I understood, this methodology
can only estimate the noise floor in the output PSD due to devices
noise and not harmonic distortion. For me it is important to see THD
and SFDR because of input switches non-linearity.

 

[Alexey Borodenkov]

You can do many different wonderful things with Cadence's Ultrasim
simulator. It is a fastmos simulator. This handles different accuracy
/ simulation speed tradeoff levels, uses a table based look up
algorithm, and also circuits could be selectively partitioned using
the Hierarchy editor. This could be driven to spice (spectre) like
accuracy trading off on speed, or selectively circuit blocks could be
given different accuracy levels.

Also this gels well into Cadence Analog Design Environment as just
another simulator option. We have seen 10:1 speed difference with
spectre with reasonable trade off on accuracy.

We have also evaluated this simulator with a another competing fastmos
simulator and found this to be better by a long way..

Partha

Thanks, I believe this tool could be really useful in my case. But
since I am i the University communicating with our system group is
always painful
Perhaps we simply do not have it.. At least I have not found it in the
list od licenses. Is it a part of Cadence ic5.xx or a separate
product?

Regards, Alex

 

[Partha]

This is a seperate simulator, does not come with ic5

borodenkov@hotmail.com (Alexey Borodenkov) wrote in message news:<c2e6dd86.0404100705.4f8e9a29@posting.google.com>...

You can do many different wonderful things with Cadence's Ultrasim
simulator. It is a fastmos simulator. This handles different accuracy
/ simulation speed tradeoff levels, uses a table based look up
algorithm, and also circuits could be selectively partitioned using
the Hierarchy editor. This could be driven to spice (spectre) like
accuracy trading off on speed, or selectively circuit blocks could be
given different accuracy levels.

Also this gels well into Cadence Analog Design Environment as just
another simulator option. We have seen 10:1 speed difference with
spectre with reasonable trade off on accuracy.

We have also evaluated this simulator with a another competing fastmos
simulator and found this to be better by a long way..

Partha

Thanks, I believe this tool could be really useful in my case. But
since I am i the University communicating with our system group is
always painful
Perhaps we simply do not have it.. At least I have not found it in the
list od licenses. Is it a part of Cadence ic5.xx or a separate
product?

Regards, Alex