Mixed clocked/combinatorial coding styles

rickman wrote:
From the use of SRLOW and SRHIGH I suspect this is not even addressing
the FF state. SR likely refers to the shift register that you get
when using the LUT memory as logic. The LUT memory *can* be set by
Maybe you should even open the V5 user guide. SR* controls the set/reset
polarity. All four parameters were FF related configuration parameters.

seen can it be controlled by the GSR signal. Did you find any mention
of what SRLOW, SRHIGH, INIT0 and INIT1 control?
Yes, you can also if you open UG190.

--Kim
 

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