Matrix multiplication

Guest
Hello to all:
I am new in this forum and also new in verilog programming. I am facing problem in verilog is that i want to multiply matrix in verilog. First i try to do with loops but i realize loops are not synthesize. So i try to do with state machine. But when i declare two dimensional array for out it give error. Please help me in this regards.If any one have code for matrix multiplication and matrix transpose . Please send me on my email."mhamzahab@gmail.com" i will be very thank full to you.
best regards
Hamza
 
On Tuesday, December 11, 2012 8:50:53 PM UTC-5, Muhammad Hamza wrote:
Hello to all: I am new in this forum and also new in verilog programming.
Perhaps you should post the problem to a Verilog group rather than VHDL.

Kevin
 
On Tue, 11 Dec 2012 17:50:53 -0800, mhamzahab wrote:

Hello to all:
I am new in this forum and also new in verilog programming.
I am facing problem in verilog is that i want to multiply
matrix in verilog. First i try to do with loops but i
realize loops are not synthesize.
Loops synthesize just fine.

At least, they do on comp.lang.vhdl...


- Brian
 
Hello,
i am trying to write verilog code for matrix multiplication 3X3 using memory
can i get from u the state machine which u had for matrix multiplication
 

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