C
colin
Guest
"Winfield Hill" <hill_a@t_rowland-dotties-harvard-dot.s-edu> wrote in
message news:d9cgmt0100a@drn.newsguy.com...
curent. Trying to think of a way of avoiding it yet still using a more
deterministic way of setting the peak voltage.
Actualy i was wondering if a cascode mosfet arangement would behave any
better, again it might make it less noticable as the bottom device would
stay more in control of the current, although i would be worried about this
as long ago I had some nasty oscilations when i was trying to make a high
voltage power supply with several series mosfets (600v mosfets were very
limited at the time), but unfortunatly i never had the time (or the
experience back then) to get to the bottom of all the diferent modes of
oscilations.
Colin =^.^=
message news:d9cgmt0100a@drn.newsguy.com...
Yes thanks thats what i was asking, as both cases have the vds>20v @ highcolin wrote...
Winfield Hill wrote ...
This active-zener method works well with low-voltage power MOSFETs,
such as under 100V, but it's dangerous with high-voltage FETs, 200V
and up, because they have a bad tendency to go into RF oscillation.
This is a high-power RF oscillation at frequencies of 15 to 40MHz,
which is very difficult to damp with external parts such a ferrite
beads, gate resistors, etc. That's because the RF oscillation is
internal to the FET, employing its inductance and self capacitance.
The required linear properties occur whenever a high current flows
while the drain-source voltage is higher than 10 to 20V. The latter
condition causes the FET capacitances to drop to the levels where RF
amplification is efficient.
If the RF feedback path is wholy internal how would this affect the
method of using a higher gate drive resistance to slow the current
fall to limit the voltage to less than the breakdown voltage?
Two different effects... The slowing of the turnoff means the
coil can flyback and dI/dt discharge as it's doing so, without
reaching the avalanche voltage, if carefully done.
or does the zener just add more parasitics to make the difference?
You're asking if oscillation doesn't happen in the event of a
slowed transition, as in the zener case? It certainly can with
high-voltage MOSFETs, although the dV/dt slewing output helps to
hide it, on the one hand, and perhaps to dampen it, on the other.
curent. Trying to think of a way of avoiding it yet still using a more
deterministic way of setting the peak voltage.
Actualy i was wondering if a cascode mosfet arangement would behave any
better, again it might make it less noticable as the bottom device would
stay more in control of the current, although i would be worried about this
as long ago I had some nasty oscilations when i was trying to make a high
voltage power supply with several series mosfets (600v mosfets were very
limited at the time), but unfortunatly i never had the time (or the
experience back then) to get to the bottom of all the diferent modes of
oscilations.
Colin =^.^=