increment or decrement one of 16, 16-bit registers

[Allan Herriman]

On Sat, 13 May 2017 13:07:40 -0700, Jecel wrote:

On Thursday, May 11, 2017 at 7:21:33 PM UTC-3, rickman wrote:
On 5/11/2017 5:55 PM, Kevin Neilson wrote:
24 cycles? Holy smokes. I remember most of the 6502 instructions
being 2-3 cycles.

No one ever said the 1802 was fast. If you want slow, you should have
seen the 1801! lol

Indeed, many early microprocessors looked a lot more impressive until
you saw how many clock cycles each instruction took.

But it is important to remember that there were two different clock
styles and it is complicated to compare them directly.

The 6502, 6800 and ARM2 used two non overlapping clocks. This required
two pins and a more complicated external circuit but simplified the
internal circuit. In a 1MHz 6502, for example, you have four different
times in which things happen in each microsecond: when clock 1 is high,
when both are low, when clock 2 is high and when both are low again.

Many processors had a single clock pin, which allowed you to use a
simple oscillator externally. But to have the same functionality of the
1MHz 6502 this single clock would have to be 4MHz so you could do four
things in each microsecond. This was the case of the 68000, for example.
The Z80 only needed to do three things.

-- Jecel

Motorola's MC6809 was available in both clocking varieties - The 'E'
suffix part number was the one with the external clock generator and two
quadrature clock input pins (called E and Q).
The non-'E' suffix part number had one clock input pin (EXTAL) and
divided by four internally. E and Q were outputs in this case.
A pin (MRDY) was available to freeze the divide by four counter to insert
wait states.

It had an 8 bit ALU. 16 bit operations took two cycles, and the 8 x 8
multiply took 8 cycles.


I vaguely recall wire wrapping one of these as a hobby project in the
early to mid '80s.

Regards,
Allan

 

[rickman]

On 5/13/2017 9:16 PM, Allan Herriman wrote:

I vaguely recall wire wrapping one of these as a hobby project in the
early to mid '80s.

I vaguely recall wire wrapping!

--

Rick C

 

[Tim Wescott]

On Wed, 10 May 2017 16:42:59 -0500, Tim Wescott wrote:

I've been geeking out on the COSMAC 1802 lately -- it was the first
processor that I owned all just for me, and that I wrote programs for
(in machine code -- not assembly).

One of the features of this chip is that while the usual ALU is 8-bit
and centered around memory fetches and the accumulator (which they call
the 'D' register), there's a 16 x 16-bit register file. Any one of
these registers can be incremented or decremented, either as an explicit
instruction or as part of a fetch (basically, you can use any one of
them as an index, and you can "fetch and increment").

How would you do this most effectively today? How might it have been
done back in the mid 1970's when RCA made the chip? Would it make a
difference if you were working with a CPLD, FPGA, or some ASIC where you
were determined to minimize chip area?

I'm assuming that the original had one selectable increment/decrement
unit that wrote back numbers to the registers, but I could see them
implementing each register as a loadable counter -- I just don't have a
good idea of what might use the least real estate.

Thanks.

Found the patent for the 1801; it shows the increment unit as separate
from the registers, and separate from the ALU. I would assume that if
it's to be binding, the patent needs to reflect what's actually there, at
least in the large:

http://www.cosmacelf.com/publications/data-sheets/cdp1802-rca.pdf

--
www.wescottdesign.com