ihdl (verilogIn) bit blast

Im trying to verilog-in which ihdl and the verilog is bus oriented calling a reference cell that has the bus bits as individual pins named trim<2> trim<1> trim<0> . The verilog is:

input [2:0] vddio_usbpad_trim;

is there a magic switch that will tell the netlister to strip off and connect the bit instead of the bus?

Thanks

 

[Andrew Beckett]

On 01/29/13 17:57, ejm20@pacbell.net wrote:

Im trying to verilog-in which ihdl and the verilog is bus oriented
calling a reference cell that has the bus bits as individual pins
named trim<2> trim<1> trim<0> . The verilog is:
input [2:0] vddio_usbpad_trim;

is there a magic switch that will tell the netlister to strip off
and
connect the bit instead of the bus?

Thanks

I don't really understand the question - if this is still an issue, you
might want to elaborate.

Andrew.