I/O switching speed of Xilinx spartan 6 or Altera EP4CE10

[Tim Wescott]

On Wed, 18 Jan 2017 14:23:43 -0500, rickman wrote:

On 1/18/2017 12:40 PM, Tim Wescott wrote:
On Wed, 18 Jan 2017 00:24:25 -0500, rickman wrote:

On 1/18/2017 12:12 AM, Tim Wescott wrote:
On Tue, 17 Jan 2017 20:30:51 -0500, rickman wrote:

On 1/17/2017 7:50 PM, rickman wrote:
On 1/17/2017 1:40 AM, Tim Wescott wrote:
On Mon, 16 Jan 2017 23:40:22 -0500, rickman wrote:

On 1/16/2017 6:59 PM, kristoff wrote:

snip

What is not clear to me is if the PSK31 signal is a PSK31
modulated audio tone that is then modulated on a carrier, or if
the carrier is directly modulated with PSK31. The articles I've
seen talk about using a PC sound card output to generate the
audio signal but they don't say how this is modulated on the
carrier... perhaps I'm showing my ignorance of ham radio. lol

If it's coming out of a sound card then the assumption is that
you're plugging it into a single-sideband transceiver.

Apples and oranges. The sound card method is what many do because
they don't need to build anything. I can't tell if the design
being transcribed from an MCU to an FPGA is intended to work that
way or rather it would seem RF will be generated directly.

It has been a while since I looked much at single side band. Is
that just AM with filtering applied or is some other method used to
generate the RF signal?

I was studying to get a ham license a half year ago. I should
remember this.


The design of a directly modulated PSK31 signal at RF means you
will generate a carrier, but it needs to be modulated both in
phase and amplitude. I don't know how they accomplished that in
the article you read, but in the FPGA the phase modulation is
just an increment that is added to the output of the phase
accumulator in the DDS, equal to half the modulus M of the
accumulator (180 degrees). The amplitude would be adjusted by a
multiplier after the sine wave generator.

Which should be easy-peasy, even for a beginner.

*If* this is the method intended.


BTW, in an FPGA there is no reason to limit yourself to a 256
entry look up table (LUT) for the sine wave generator. There are
also shortcuts you can use to cut the size of this table by 4.
So using a 2048 entry table you can use 8192 points per cycle of
the sine wave. These take advantage of the redundancy of the
values in a sine wave cycle, ramping up vs ramping down and
positive values vs.
negative values. You also don't even need to use a LUT. There
are approximations using multiplies that can get you 18 bits of
resolution on the input to the sine generator. This reduces what
is called phase truncation which creates close in spurs to the
carrier which are hard to filter out. More phase resolution
reduces these spurs and gives you a cleaner signal.

I spent some time looking at DDS designs in FPGAs and found that
most designs stop well short of squeezing the best performance
available.

I'm not sure that he needs the best performance available, but
given that he's a beginner I think he needs something simple.

Later on he can get more complicated.

Maybe, maybe not. Amateur radio has specs on unintended emissions.
I don't know if an 8 bit input/360 degree sine table would provide
low enough noise. That's only 6 bits of magnitude resolution.
This degree of truncation in the phase word will generate lots of
close in spurs which can't be easily filtered.

I did a little reading an found that SSB is a bit more complex to
generate than the PSK31 signal. So directly generating a PSK31
modulated SSB signal will be a bit harder to do than just using a
DDS circuit. But then nothing says the PSK31 signal *has* to be SSB
modulated.

Still not sure what the OP intends here. I hope he is coming up to
speed on how a DDS works.

If all you want to do is generate PSK31 and drive an antenna with it,
you do exactly the same thing at RF that you would do at audio to
drive it out a sound card, only with a higher carrier.

If you treat a SSB transmitter as a black box, it's just shifting up
the frequency of the stuff coming in by many MHz, and pumping the
result out the antenna. How that's _done_ is complicated, but it's
conceptually simple.

It is my impression simply mixing the baseband signal up to RF is
*not*
what SSB is.

Not _simply_ mixing, no -- just doing that gets you a double sideband
signal, with few advantages over AM. You need to remove one sideband
in the mixing process. But that's all inside the black box.

Yes, I know. I was taking exception with your statement, "it's /just/
shifting up the frequency". Also, I'm pretty sure to get SSB you
*don't* do exactly the same thing at RF that you would do at audio to
generate a PSK31 signal. SSB seems to be the convention for
transmitting PSK31 since this is mostly used for QRP and SSB will get a
better range.

If you shift the carrier by 180 degrees at audio, you shift the carrier
180 degrees at RF. If you reduce the signal by a factor of five at
audio, you reduce the signal by a factor of five at RF.

That's just how SSB works. Direct-to-RF PSK just does all of it's
manipulations to an RF carrier, and forgoes making an audio signal that's
then converted up to RF.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

I'm looking for work -- see my website!

 

[kristoff]

Hi Tim,


On 17-01-17 07:40, Tim Wescott wrote:

I spent some time looking at DDS designs in FPGAs and found that most
designs stop well short of squeezing the best performance available.

I'm not sure that he needs the best performance available, but given that
he's a beginner I think he needs something simple.
Later on he can get more complicated.

That's correct. Just to have something that I can play with.


The big advantage of direct synthesis is that I do not need anything
else except equipement that I already have.

Just a small wire from output of the DDS next to the antenna of my
FT857D (as SSB receiver) and that should be enough to get the signal
back into my PC using my standard "digimode" setup.
If I have done everything correctly, fldigi (digimode application on
linux- should then be able to decode what I have created on the FPGA.





After all, this started as a small exercise for verilog for something
that is -more or less- usefull.
If the PSK31 encoding part works, we can then work on the analog part:
add filters to "clean up" the signal, amplify, antenna-adjusment, ...
but I'll do that together with some people who are better on "analog"
then myself.

The question on "how fast can an I/O port on a FPGA actually switch"
just came up while working on this.



Another element I like to explore is the question what an implemention
on a CPLD looks like. I have two boards with cheap altera CPLDs.
It's interesting to see what the lack of a hardware multiplying unit (as
compaired to a FPGA) does to a design.



Cheerio! Kr. Bonne.


(or, as we hams like to say)

73
kristoff - ON1ARF