F
fl
Guest
Hi,
This is a self exercise. It is in a test bench I want to signal 'clk' to
a clock signal in a component. On the web one close answer is about convert
an integer to std_logic_vector. It also mentions it can apply to 1 bit.
Unfortunately it is not successful for me to convert bit to std_logic.
Can you help me?
Thanks,
signal clk: bit;
signal clk_logic: std_logic;
begin
clk_logic <= std_logic(clk); -- wrong
end
This is a self exercise. It is in a test bench I want to signal 'clk' to
a clock signal in a component. On the web one close answer is about convert
an integer to std_logic_vector. It also mentions it can apply to 1 bit.
Unfortunately it is not successful for me to convert bit to std_logic.
Can you help me?
Thanks,
signal clk: bit;
signal clk_logic: std_logic;
begin
clk_logic <= std_logic(clk); -- wrong
end