Help with Laplace Transform for PLL VCO, Kvco?????

[Kevin Aylward]

Fred Bloggs wrote:

Dr. Slick wrote:


In my mind, this is really just an example of the Barkhausen
Criteria, where at unity gain for a closed-loop system, the phase
shift must be 0 degrees or an intergral multiple of 2pi (positive
feedback). So for max stability, we have to keep the phase close to
180 deg. (negative feedback).

Most loops are designed for a damping factor of 0.7 and this puts the
phase margin near 45 degrees

Arhh...well, lets drop the "most" bit. The acceptable phase margin is
cost, performance, schedule determined. A typically goal for audio
amplifies might be 60 deg. For LDO's, one might well be stuck with
err...15 degs... trust me...

- I don't think anyone has discovered a
way to achieve a rolloff to 0dB gain with 180 degree phase margin just
yet-unless the loop starts off at 0dB- a weak and useless loop.

As has been mentioned many times here, that would be a time machine.

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

"quotes with no meaning, are meaningless" - Kevin Aylward.

 

[John Larkin]

On Thu, 18 Mar 2004 12:02:47 GMT, Fred Bloggs <nospam@nospam.com>
wrote:

Most loops are designed for a damping factor of 0.7 and this puts the
phase margin near 45 degrees- I don't think anyone has discovered a way
to achieve a rolloff to 0dB gain with 180 degree phase margin just
yet-

The last PLL I did had a 180 degree margin, or so close that it
doesn't matter. All you need is a fairly wideband error amp and an
oscillator with a small Kvco, so the vco 1/s is dominant. Used a
simple TinyLogic XOR gate as the phase detector. It could have easily
been pushed *over* 180 margin if there was any reason to do it.

unless the loop starts off at 0dB

No PLL starts off at 0 dB... not as long as the VCO transfer function
is 1/s.

- a weak and useless loop.

It's only useless if the customer won't pay the invoice, and they did.

John

 

[Kevin Aylward]

John Larkin wrote:

On Thu, 18 Mar 2004 12:02:47 GMT, Fred Bloggs <nospam@nospam.com
wrote:


Most loops are designed for a damping factor of 0.7 and this puts the
phase margin near 45 degrees- I don't think anyone has discovered a
way to achieve a rolloff to 0dB gain with 180 degree phase margin
just yet-

The last PLL I did had a 180 degree margin, or so close that it
doesn't matter.

Pardon...

All you need is a fairly wideband error amp and an
oscillator with a small Kvco, so the vco 1/s is dominant.

Err,.... 1/s gives a 90 deg shift. You can not roll off the gain without
having phase shift. I'm sure you must have a point, but it escapes me.

Used a
simple TinyLogic XOR gate as the phase detector. It could have easily
been pushed *over* 180 margin if there was any reason to do it.

This makes no sense. Over 180 is equivalent to 360 - (over 180),
therefore it is back to less than 180 deg of phase margin. Stability is
how near to the net O phase shift. It matters not which direction it is
being approached, i.e. 0, 360, 720 etc.


Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

"quotes with no meaning, are meaningless" - Kevin Aylward.

 

[John Larkin]

On Thu, 18 Mar 2004 19:25:02 -0000, "Kevin Aylward"
<kevindotaylwardEXTRACT@anasoft.co.uk> wrote:

John Larkin wrote:
On Thu, 18 Mar 2004 12:02:47 GMT, Fred Bloggs <nospam@nospam.com
wrote:


Most loops are designed for a damping factor of 0.7 and this puts the
phase margin near 45 degrees- I don't think anyone has discovered a
way to achieve a rolloff to 0dB gain with 180 degree phase margin
just yet-

The last PLL I did had a 180 degree margin, or so close that it
doesn't matter.

Pardon...

All you need is a fairly wideband error amp and an
oscillator with a small Kvco, so the vco 1/s is dominant.

Err,.... 1/s gives a 90 deg shift. You can not roll off the gain without
having phase shift. I'm sure you must have a point, but it escapes me.

Used a
simple TinyLogic XOR gate as the phase detector. It could have easily
been pushed *over* 180 margin if there was any reason to do it.

This makes no sense. Over 180 is equivalent to 360 - (over 180),
therefore it is back to less than 180 deg of phase margin. Stability is
how near to the net O phase shift. It matters not which direction it is
being approached, i.e. 0, 360, 720 etc.

Oh yeah, I guess I meant 90, namely a loop with mostly no filter at
all. You could actually add some phase lead and get close to 180, if
you wanted, but the 90 loop is nicely sluggish as-is.

Please don't be too critical of anything I post before, say, 10:15 AM
when the latte kicks in.

John

 

[Dr. Slick]

Fred Bloggs <nospam@nospam.com> wrote in message news:<40598FD9.8000700@nospam.com>...

Dr. Slick wrote:

In my mind, this is really just an example of the Barkhausen
Criteria, where at unity gain for a closed-loop system, the phase
shift must be 0 degrees or an intergral multiple of 2pi (positive
feedback). So for max stability, we have to keep the phase close to
180 deg. (negative feedback).

Most loops are designed for a damping factor of 0.7 and this puts the
phase margin near 45 degrees- I don't think anyone has discovered a way
to achieve a rolloff to 0dB gain with 180 degree phase margin just
yet-unless the loop starts off at 0dB- a weak and useless loop. And you
seem to be confused about the phase shift of the control loop and the
output phase error- these are two different phases. The loop phase is an
analytical description of the phasing of the phase error feedback
correction and not the phase error itself- but that's okay- just don't
register a web page explaining your concept to the whole world as seems
to be the rule for many seriously confused individuals.

Well, i may have confused you, because for the Barkhausen case, it
usually refers to an oscillator, or an amplifier with a feedback loop.
So at unity gain, where the closed-loop transfer function will be
theoretically infinite (zero denominator), the phase must be be 0
degrees or
an interger multiple of 2pi or 360 degrees (positive feedback).

For the PLL case (which i understand is different situation really,
because we are talking about an already "unstable" oscillator which is
to be made stable), i believe it is the phase detector that supplies a
180 degree phase shift. So consequently, because it is still a
closed-loop, the point of instability at 0dB is now 180 degrees
(180x2=360). So the phase margin is
called the difference from 180 degrees (more PM, more stability but
slower acquisition time of the control-loop, or higher damping
factor).
So in essence, the Barkhausen criteria is being applied to the
PLL,
determining if we have a "stable" oscillator (a bit of a mis-nomer,
eh?), or an "unstable" oscillator (oscillator that cannot lock into
the ref. frequency).



Slick

 

[Allan Herriman]

On Thu, 18 Mar 2004 14:03:05 -0000, "Kevin Aylward"
<kevindotaylwardEXTRACT@anasoft.co.uk> wrote:

Fred Bloggs wrote:
Dr. Slick wrote:


In my mind, this is really just an example of the Barkhausen
Criteria, where at unity gain for a closed-loop system, the phase
shift must be 0 degrees or an intergral multiple of 2pi (positive
feedback). So for max stability, we have to keep the phase close to
180 deg. (negative feedback).

Most loops are designed for a damping factor of 0.7 and this puts the
phase margin near 45 degrees

Arhh...well, lets drop the "most" bit. The acceptable phase margin is
cost, performance, schedule determined. A typically goal for audio
amplifies might be 60 deg. For LDO's, one might well be stuck with
err...15 degs... trust me...

.... and yet other systems (e.g. SONET clock repeaters) must have an
(input phase to output phase) transfer function that is less than
+0.1dB at all frequencies. This is often done with a Type 2 system
that is heavily overdamped.

Regards,
Allan.

 

[Kevin Aylward]

Dr. Slick wrote:

Fred Bloggs <nospam@nospam.com> wrote in message
news:<40598FD9.8000700@nospam.com>...
Dr. Slick wrote:

In my mind, this is really just an example of the Barkhausen
Criteria, where at unity gain for a closed-loop system, the phase
shift must be 0 degrees or an intergral multiple of 2pi (positive
feedback). So for max stability, we have to keep the phase close to
180 deg. (negative feedback).

Most loops are designed for a damping factor of 0.7 and this puts the
phase margin near 45 degrees- I don't think anyone has discovered a
way to achieve a rolloff to 0dB gain with 180 degree phase margin
just yet-unless the loop starts off at 0dB- a weak and useless loop.
And you seem to be confused about the phase shift of the control
loop and the output phase error- these are two different phases. The
loop phase is an analytical description of the phasing of the phase
error feedback correction and not the phase error itself- but that's
okay- just don't register a web page explaining your concept to the
whole world as seems to be the rule for many seriously confused
individuals.


Well, i may have confused you, because for the Barkhausen case, it
usually refers to an oscillator, or an amplifier with a feedback loop.
So at unity gain, where the closed-loop transfer function will be
theoretically infinite (zero denominator), the phase must be be 0
degrees or
an interger multiple of 2pi or 360 degrees (positive feedback).

For the PLL case (which i understand is different situation really,
because we are talking about an already "unstable" oscillator which is
to be made stable),

It is the same situation in that one is considering the envelope of the
vco, not the vco frequency itself. Is the envelope stable or not, i.e.
constant.

i believe it is the phase detector that supplies a
180 degree phase shift.

May or may not do. Its not really relevant what the sign of the PD is,
there might well be an inverting amp after it.

So consequently, because it is still a
closed-loop, the point of instability at 0dB is now 180 degrees
(180x2=360). So the phase margin is
called the difference from 180 degrees (more PM, more stability but
slower acquisition time of the control-loop, or higher damping
factor).

Its really how close to a net 0 degrees. The 180 bits and bobs are just
terminology based on an arbitrary reference.


Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

"quotes with no meaning, are meaningless" - Kevin Aylward.

 

[Kevin Aylward]

John Larkin wrote:

On Thu, 18 Mar 2004 19:25:02 -0000, "Kevin Aylward"
kevindotaylwardEXTRACT@anasoft.co.uk> wrote:

John Larkin wrote:
On Thu, 18 Mar 2004 12:02:47 GMT, Fred Bloggs <nospam@nospam.com
wrote:


Most loops are designed for a damping factor of 0.7 and this puts
the phase margin near 45 degrees- I don't think anyone has
discovered a way to achieve a rolloff to 0dB gain with 180 degree
phase margin just yet-

The last PLL I did had a 180 degree margin, or so close that it
doesn't matter.

Pardon...

All you need is a fairly wideband error amp and an
oscillator with a small Kvco, so the vco 1/s is dominant.

Err,.... 1/s gives a 90 deg shift. You can not roll off the gain
without having phase shift. I'm sure you must have a point, but it
escapes me.

Used a
simple TinyLogic XOR gate as the phase detector. It could have
easily been pushed *over* 180 margin if there was any reason to do
it.

This makes no sense. Over 180 is equivalent to 360 - (over 180),
therefore it is back to less than 180 deg of phase margin. Stability
is how near to the net O phase shift. It matters not which direction
it is being approached, i.e. 0, 360, 720 etc.



Oh yeah, I guess I meant 90, namely a loop with mostly no filter at
all.

Yes. A typical PLL can still lock with no filter.

You could actually add some phase lead and get close to 180, if
you wanted, but the 90 loop is nicely sluggish as-is.

Please don't be too critical of anything I post before, say, 10:15 AM
when the latte kicks in.

Indeed.

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

"quotes with no meaning, are meaningless" - Kevin Aylward.

 

[John Larkin]

On Fri, 19 Mar 2004 09:52:33 -0000, "Kevin Aylward"
<kevindotaylwardEXTRACT@anasoft.co.uk> wrote:

John Larkin wrote:
On Thu, 18 Mar 2004 19:25:02 -0000, "Kevin Aylward"
kevindotaylwardEXTRACT@anasoft.co.uk> wrote:

John Larkin wrote:


Oh yeah, I guess I meant 90, namely a loop with mostly no filter at
all.

Yes. A typical PLL can still lock with no filter.

You could actually add some phase lead and get close to 180, if
you wanted, but the 90 loop is nicely sluggish as-is.

Please don't be too critical of anything I post before, say, 10:15 AM
when the latte kicks in.


Indeed.

Hmmm... 90 degrees out. I need a break. I will retire into seclusion
for a week and contemplate my sins.

http://www.skinorthstar.com/winter/mountain-overview.html


John

 

[Dr. Slick]

"Kevin Aylward" <kevindotaylwardEXTRACT@anasoft.co.uk> wrote in message news:<Epz6c.46$_r2.4@newsfep3-gui.server.ntli.net>...

Oh yeah, I guess I meant 90, namely a loop with mostly no filter at
all.

Yes. A typical PLL can still lock with no filter.

Oh certainly, like for a simple clock for a CPU.

But don't try to analog FM modulate it at the varactor of the VCO!

The loop will "correct" you modulation, as there is no filter.


Slick

 

[Dr. Slick]

John Larkin <jjlarkin@highSNIPlandTHIStechPLEASEnology.com> wrote in message news:<4unj50pvtnn2fi2mkshhvtlld6v6u7nttl@4ax.com>...

The last PLL I did had a 180 degree margin, or so close that it
doesn't matter. All you need is a fairly wideband error amp and an
oscillator with a small Kvco, so the vco 1/s is dominant. Used a
simple TinyLogic XOR gate as the phase detector. It could have easily
been pushed *over* 180 margin if there was any reason to do it.

How did you measure this? How did you measure the phase margin
exactly? Or is this your calculated value?



Slick

 

[Dr. Slick]

"Kevin Aylward" <kevindotaylwardEXTRACT@anasoft.co.uk> wrote in message news:<1pz6c.44$_r2.30@newsfep3-gui.server.ntli.net>...

For the PLL case (which i understand is different situation really,
because we are talking about an already "unstable" oscillator which is
to be made stable),

It is the same situation in that one is considering the envelope of the
vco, not the vco frequency itself. Is the envelope stable or not, i.e.
constant.

Then you agree that for H(s)= Forward Gain/(1+Loop Gain), that for
the
unity gain point, we want the denominator to be 2 and not zero,
which is really expressing the Barkhausen Criteria.

i believe it is the phase detector that supplies a
180 degree phase shift.

May or may not do. Its not really relevant what the sign of the PD is,
there might well be an inverting amp after it.

H(s)= Forward Gain/(1+Loop Gain), so because we have a "+" in
the
denominator, there must be a 180 degree phase shift somewhere from the
sampling line of the VCO and back.

So consequently, because it is still a
closed-loop, the point of instability at 0dB is now 180 degrees
(180x2=360). So the phase margin is
called the difference from 180 degrees (more PM, more stability but
slower acquisition time of the control-loop, or higher damping
factor).

Its really how close to a net 0 degrees. The 180 bits and bobs are just
terminology based on an arbitrary reference.

Correct, because the 180 degrees is built into the loop as i have
mentioned above (we want negative feedback for stability).

Question: how exactly does one actually MEASURE (not calculate)
the phase margin?



Slick

 

[Tim Wescott]

"Dr. Slick" <radio913@aol.com> wrote in message
news:1d15af91.0403191200.3c43726d@posting.google.com...

"Kevin Aylward" <kevindotaylwardEXTRACT@anasoft.co.uk> wrote in message
news:<1pz6c.44$_r2.30@newsfep3-gui.server.ntli.net>...

For the PLL case (which i understand is different situation really,
because we are talking about an already "unstable" oscillator which is
to be made stable),

It is the same situation in that one is considering the envelope of the
vco, not the vco frequency itself. Is the envelope stable or not, i.e.
constant.


Then you agree that for H(s)= Forward Gain/(1+Loop Gain), that for
the
unity gain point, we want the denominator to be 2 and not zero,
which is really expressing the Barkhausen Criteria.




i believe it is the phase detector that supplies a
180 degree phase shift.

May or may not do. Its not really relevant what the sign of the PD is,
there might well be an inverting amp after it.


H(s)= Forward Gain/(1+Loop Gain), so because we have a "+" in
the
denominator, there must be a 180 degree phase shift somewhere from the
sampling line of the VCO and back.



So consequently, because it is still a
closed-loop, the point of instability at 0dB is now 180 degrees
(180x2=360). So the phase margin is
called the difference from 180 degrees (more PM, more stability but
slower acquisition time of the control-loop, or higher damping
factor).

Its really how close to a net 0 degrees. The 180 bits and bobs are just
terminology based on an arbitrary reference.



Correct, because the 180 degrees is built into the loop as i have
mentioned above (we want negative feedback for stability).

Question: how exactly does one actually MEASURE (not calculate)
the phase margin?



Slick

The most popular method is to put a summing junction somewhere in your loop,
with one argument being the regular loop signal and the other being under
your control. Inject a swept sine wave into the junction, and compare the
amplitude and phase of the signal at the output of the junction and at the
loop input. You can then calculate the open-loop amplitude and phase
directly.

There's things called "transfer function analysers", "dynamic system
analyzers" and "control system analysers" that will do this for you, but you
have to part with many $.

 

[Kevin Aylward]

Dr. Slick wrote:

"Kevin Aylward" <kevindotaylwardEXTRACT@anasoft.co.uk> wrote in
message news:<1pz6c.44$_r2.30@newsfep3-gui.server.ntli.net>...

For the PLL case (which i understand is different situation
really, because we are talking about an already "unstable"
oscillator which is to be made stable),

It is the same situation in that one is considering the envelope of
the vco, not the vco frequency itself. Is the envelope stable or
not, i.e. constant.


Then you agree that for H(s)= Forward Gain/(1+Loop Gain), that for
the
unity gain point, we want the denominator to be 2 and not zero,

Well, it only has to be not equal to 0. 2 is just one of an infinite
number of numbers that will ensure stability.

So consequently, because it is still a
closed-loop, the point of instability at 0dB is now 180 degrees
(180x2=360). So the phase margin is
called the difference from 180 degrees (more PM, more stability but
slower acquisition time of the control-loop, or higher damping
factor).

Its really how close to a net 0 degrees. The 180 bits and bobs are
just terminology based on an arbitrary reference.



Correct, because the 180 degrees is built into the loop as i have
mentioned above (we want negative feedback for stability).

Not necessarily. You can have positive feedback, with lashings of gain
and still be perfectly stable.

Question: how exactly does one actually MEASURE (not calculate)
the phase margin?

Inject signals. see
http://www.spectrum-soft.com/news/spring97/loopgain.shtm

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

"quotes with no meaning, are meaningless" - Kevin Aylward.

 

[Dr. Slick]

"Tim Wescott" <tim@wescottnospamdesign.com> wrote in message news:<105mo25qvp66u23@corp.supernews.com>...

Question: how exactly does one actually MEASURE (not calculate)
the phase margin?


Slick

The most popular method is to put a summing junction somewhere in your loop,
with one argument being the regular loop signal and the other being under
your control. Inject a swept sine wave into the junction, and compare the
amplitude and phase of the signal at the output of the junction and at the
loop input. You can then calculate the open-loop amplitude and phase
directly.

Ok, but when you do this, the loop is never really opened, and the
site
that Kevin posted tells us that we shouldn't open the loop to measure
the open loop gain, as the DC points will be off.

So you measure the closed-loop response, and then calculate the
open-loop
gain from that right? And then find the 0 dB, or unity gain point,
and see what the distance from 180 degrees it is. This will be you
phase margin, eh?

There's things called "transfer function analysers", "dynamic system
analyzers" and "control system analysers" that will do this for you, but you
have to part with many $.

Can you give us a model # or brand?


Slick

 

[Dr. Slick]

"Kevin Aylward" <kevindotaylwardEXTRACT@anasoft.co.uk> wrote in message news:<B3L6c.546$_r2.319@newsfep3-gui.server.ntli.net>...

Then you agree that for H(s)= Forward Gain/(1+Loop Gain), that for
the
unity gain point, we want the denominator to be 2 and not zero,

Well, it only has to be not equal to 0. 2 is just one of an infinite
number of numbers that will ensure stability.

Well, of course you are correct. I just pointed out the extreme
cases of fully positive feedback (denominator=0) and fully negative
feedback (denominator=2). Not that these are both at unity gain.
We just need it to not be 0, or the closed-loop gain goes to
infinity, and therefore unstable.

Correct, because the 180 degrees is built into the loop as i have
mentioned above (we want negative feedback for stability).

Not necessarily. You can have positive feedback, with lashings of gain
and still be perfectly stable.

Correct. H(s)= Forward Gain/(1+Loop Gain), so when we have
greater than
unity gain (or less than unity gain), neither positive nor negative
feedback is a problem.

Question: how exactly does one actually MEASURE (not calculate)
the phase margin?


Inject signals. see
http://www.spectrum-soft.com/news/spring97/loopgain.shtm

This is an interesting site. I will have to look at it in more
detail
later.

Have you actually used this method yourself? It seems that using
this method will get you the H(s), or the closed loop gain vs.
frequency. And then you use H(s)= Forward Gain/(1+Loop Gain), to find
the Loop Gain. And then find where the 0dB or unity gain point is,
and measure the degrees from 180.


However, this is still a simulation method. I'm interested in an
actual
bench measurement of a phase margin.


The site mentions that:

"The problem when trying to simulate loop gain is that in
opening up the loop to make the proper measurements, the DC bias point
of the circuit will be altered. Since the circuit is linearized around
the DC bias point in AC analysis, this will throw off the results of
the entire simulation."

But it doesn't say if you cannot measure an ACTUAL CIRCUIT open
loop gain by opening the loop.



Slick

 

[Kevin Aylward]

Dr. Slick wrote:

"Kevin Aylward" <kevindotaylwardEXTRACT@anasoft.co.uk> wrote in
message news:<B3L6c.546$_r2.319@newsfep3-gui.server.ntli.net>...


Then you agree that for H(s)= Forward Gain/(1+Loop Gain), that
for the
unity gain point, we want the denominator to be 2 and not zero,

Well, it only has to be not equal to 0. 2 is just one of an infinite
number of numbers that will ensure stability.



Well, of course you are correct. I just pointed out the extreme
cases of fully positive feedback (denominator=0) and fully negative
feedback (denominator=2). Not that these are both at unity gain.
We just need it to not be 0, or the closed-loop gain goes to
infinity, and therefore unstable.




Correct, because the 180 degrees is built into the loop as i
have mentioned above (we want negative feedback for stability).

Not necessarily. You can have positive feedback, with lashings of
gain and still be perfectly stable.


Correct. H(s)= Forward Gain/(1+Loop Gain), so when we have
greater than
unity gain (or less than unity gain), neither positive nor negative
feedback is a problem.





Question: how exactly does one actually MEASURE (not calculate)
the phase margin?


Inject signals. see
http://www.spectrum-soft.com/news/spring97/loopgain.shtm


This is an interesting site. I will have to look at it in more
detail
later.

Have you actually used this method yourself? It seems that using
this method will get you the H(s), or the closed loop gain vs.
frequency. And then you use H(s)= Forward Gain/(1+Loop Gain), to find
the Loop Gain. And then find where the 0dB or unity gain point is,
and measure the degrees from 180.


However, this is still a simulation method. I'm interested in an
actual
bench measurement of a phase margin.

Try and find a feedback node that is low impedance driving a high
impedance. If one knows what the circuit should be doing, one might be
able to get a reasonable approximation by using a floating, series
voltage source and calculating the ratio of its voltage to ground.
Sometimes a transformer is use to couple in the excitation signal.

The site mentions that:

"The problem when trying to simulate loop gain is that in
opening up the loop to make the proper measurements, the DC bias point
of the circuit will be altered. Since the circuit is linearized around
the DC bias point in AC analysis, this will throw off the results of
the entire simulation."

If you use SuperSpice this is not an issue. There is a special resister
that can be used that can be set automatically low for operating point
and transient and high for AC. See the example LoopCutter.sss.

Secondly, if you know that the output impedance of a node is low, you
can simple use the series voltage source alone, and get quite accurate
results. Again, SuperSpice has this technique built right into it. See
that example, AutomaticLoopGain.sss.

But it doesn't say if you cannot measure an ACTUAL CIRCUIT open
loop gain by opening the loop.

You can't in real life. Its way worse. In a simulation, sometimes you
have zero offsets such that the open loop still bias up correctly.

Typically, you might be able to use a very large capacitor to bypass the
feedback to ground.

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

"quotes with no meaning, are meaningless" - Kevin Aylward.

 

[Kevin Aylward]

Kevin Aylward wrote:

Dr. Slick wrote:

Well, it only has to be not equal to 0. 2 is just one of an infinite
number of numbers that will ensure stability.



Well, of course you are correct. I just pointed out the extreme
cases of fully positive feedback (denominator=0) and fully negative
feedback (denominator=2). Not that these are both at unity gain.
We just need it to not be 0, or the closed-loop gain goes to
infinity, and therefore unstable.

I missed noting another technical point here. The denominator does not
have to go to 0 at some real, physical frequency for the system to be
unstable at that frequency, i.e. on the axis. The infinite gain
condition is a bit of a red herring in the sense that the gain isn't
usually infinite at the frequency it oscillates at. The condition is no
pole in the right hand plane. The pole does not have to lie on the real
axis, or jw axis, depending on your point of view, for the system to be
unstable.

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

"quotes with no meaning, are meaningless" - Kevin Aylward.

 

[Dr. Slick]

"Kevin Aylward" <kevindotaylwardEXTRACT@anasoft.co.uk> wrote in message news:<ZhX6c.68$Kt4.22@newsfep3-gui.server.ntli.net>...

However, this is still a simulation method. I'm interested in an
actual
bench measurement of a phase margin.

Try and find a feedback node that is low impedance driving a high
impedance. If one knows what the circuit should be doing, one might be
able to get a reasonable approximation by using a floating, series
voltage source and calculating the ratio of its voltage to ground.
Sometimes a transformer is use to couple in the excitation signal.



The site mentions that:

"The problem when trying to simulate loop gain is that in
opening up the loop to make the proper measurements, the DC bias point
of the circuit will be altered. Since the circuit is linearized around
the DC bias point in AC analysis, this will throw off the results of
the entire simulation."

If you use SuperSpice this is not an issue. There is a special resister
that can be used that can be set automatically low for operating point
and transient and high for AC. See the example LoopCutter.sss.

Secondly, if you know that the output impedance of a node is low, you
can simple use the series voltage source alone, and get quite accurate
results. Again, SuperSpice has this technique built right into it. See
that example, AutomaticLoopGain.sss.

Jesus, i didn't realize that you were advertising! heeheh!

Can Superspice analyze transient responses of PLL? Acquisition
times,
phase margin, and bandwidth, etc?

But it doesn't say if you cannot measure an ACTUAL CIRCUIT open
loop gain by opening the loop.

You can't in real life. Its way worse. In a simulation, sometimes you
have zero offsets such that the open loop still bias up correctly.

ok, so the phase margin can never really be measured on the
bench in
an actual circuit? It's just a theoretical calculation that might
help you achieve stability when designing the circuit?

That's what it sounds like you are saying, which sounds
plausible.

But buy definition, the open loop gain is just all the blocks of
the PLL
in series, so there should be a way to measure its transfer function.



Slick

 

[John Woodgate]

I read in sci.electronics.design that Dr. Slick <radio913@aol.com> wrote
(in <1d15af91.0403201201.39b0a9c5@posting.google.com&gt about 'Help with
Laplace Transform for PLL VCO, Kvco?????', on Sat, 20 Mar 2004:

ok, so the phase margin can never really be measured on the bench
in an actual circuit? It's just a theoretical calculation that might
help you achieve stability when designing the circuit?

I'm not at all sure about that. A PLL is a deterministic system, so it
should be possible to find out a lot about it by measurements at its
ports.

You can find the phase margin of an amplifier by determining the phase-
shift it produces at its unity-gain frequency.
--
Regards, John Woodgate, OOO - Own Opinions Only.
The good news is that nothing is compulsory.
The bad news is that everything is prohibited.
http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk