Help with Laplace Transform for PLL VCO, Kvco?????

D

Dr. Slick

Guest
Hello,

I've been interested in the Phase locked loop for some time
now, and something has always got me wondering.

Why do they have the 1/s (s is the complex variable in Laplace
and
is equal to jw) for the transfer function of the Voltage controlled
oscillator?

I understand that the Kvco is usually in MHz/volt, but could
someone explain why it has the 1/s? Which indicates that the transfer
function goes to infinity at DC (0 Hz)?

My guess today has been that the tuning voltage can be at a DC
voltage (like a single phase), and yet the phase of the output
continues to increase, which kinda implies that the Output phi/Input
phi gain is infinite.

Any educated comments?


Slick
 
On 16 Mar 2004 18:44:09 -0800, radio913@aol.com (Dr. Slick) wrote:

Hello,

I've been interested in the Phase locked loop for some time
now, and something has always got me wondering.

Why do they have the 1/s (s is the complex variable in Laplace
and
is equal to jw) for the transfer function of the Voltage controlled
oscillator?

I understand that the Kvco is usually in MHz/volt, but could
someone explain why it has the 1/s? Which indicates that the transfer
function goes to infinity at DC (0 Hz)?

My guess today has been that the tuning voltage can be at a DC
voltage (like a single phase), and yet the phase of the output
continues to increase, which kinda implies that the Output phi/Input
phi gain is infinite.

Any educated comments?


Slick

Well, the 1/s is actually the transfer function of the VCO *and* the
phase detector, but they just blame it all on the VCO.

Voltage into the VCO changes its frequency.

But phase into the phase detector determines its output voltage.

And phase is the integral (1/s) of frequency.

Imagine the VCO and the reference oscillator being exactly identical
in phase and frequency; the PD output is zero. Now change the VCO
control voltage by a small step. The VCO frequency changes, the VCO
phase begins to drift away from the ref osc phase, and the PD output
becomes a linear ramp. A ramp is the integral of a step.

John
 
On 16 Mar 2004 18:44:09 -0800, radio913@aol.com (Dr. Slick) wrote:

Hello,

I've been interested in the Phase locked loop for some time
now, and something has always got me wondering.

Why do they have the 1/s (s is the complex variable in Laplace
and
is equal to jw) for the transfer function of the Voltage controlled
oscillator?

I understand that the Kvco is usually in MHz/volt, but could
someone explain why it has the 1/s? Which indicates that the transfer
function goes to infinity at DC (0 Hz)?

My guess today has been that the tuning voltage can be at a DC
voltage (like a single phase), and yet the phase of the output
continues to increase, which kinda implies that the Output phi/Input
phi gain is infinite.

Any educated comments?
The VCO is an integrator! It helps if you think of the output *phase*
of the VCO rather than the output frequency. (Remember, this is a
*Phase* Locked Loop, and the all the variables in the analysis
represent either voltage, current or phase.)

1/s is (the transform of) an integrator.

The transfer function does indeed go to infinity at DC. A DC input to
a VCO (= a constant control voltage) produces a fixed output
frequency, which is equivalent to a continuously ramping output phase.

As you noted, Kvco may be expressed in MHz/volt, but this could be
expressed as radian/second/volt, which should make it clear that the
output phase is proportional to the time integral of the input
voltage.

Regards,
Allan.
 
On Tue, 16 Mar 2004 19:53:15 -0800, John Larkin wrote:

On 16 Mar 2004 18:44:09 -0800, radio913@aol.com (Dr. Slick) wrote:

Hello,

I've been interested in the Phase locked loop for some time
now, and something has always got me wondering.

Why do they have the 1/s (s is the complex variable in Laplace
and
is equal to jw) for the transfer function of the Voltage controlled
oscillator?

I understand that the Kvco is usually in MHz/volt, but could
someone explain why it has the 1/s? Which indicates that the transfer
function goes to infinity at DC (0 Hz)?

My guess today has been that the tuning voltage can be at a DC
voltage (like a single phase), and yet the phase of the output
continues to increase, which kinda implies that the Output phi/Input
phi gain is infinite.

Any educated comments?


Slick


Well, the 1/s is actually the transfer function of the VCO *and* the
phase detector, but they just blame it all on the VCO.
How's that? The 1/s term converts the VCO frequency to phase (the output
we're interested in); the phase detector responds to phase, which is the
system output after the 1/s term. The 1/s term is thus confined to the VCO,
isn't it?

-- Mike --
 
Mike wrote:
On Tue, 16 Mar 2004 19:53:15 -0800, John Larkin wrote:

On 16 Mar 2004 18:44:09 -0800, radio913@aol.com (Dr. Slick) wrote:

Hello,

I've been interested in the Phase locked loop for some time
now, and something has always got me wondering.

Why do they have the 1/s (s is the complex variable in Laplace
and
is equal to jw) for the transfer function of the Voltage controlled
oscillator?

I understand that the Kvco is usually in MHz/volt, but could
someone explain why it has the 1/s? Which indicates that the
transfer function goes to infinity at DC (0 Hz)?

My guess today has been that the tuning voltage can be at a DC
voltage (like a single phase), and yet the phase of the output
continues to increase, which kinda implies that the Output phi/Input
phi gain is infinite.

Any educated comments?


Slick


Well, the 1/s is actually the transfer function of the VCO *and* the
phase detector, but they just blame it all on the VCO.

How's that? The 1/s term converts the VCO frequency to phase (the
output we're interested in); the phase detector responds to phase,
which is the system output after the 1/s term. The 1/s term is thus
confined to the VCO, isn't it?
Yep.

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

"quotes with no meaning, are meaningless" - Kevin Aylward.
 
"Mike" <mike@nospam.com> wrote in message
news:1glnnoamkgde.k87ekrxou1oo.dlg@40tude.net...
On Tue, 16 Mar 2004 19:53:15 -0800, John Larkin wrote:

On 16 Mar 2004 18:44:09 -0800, radio913@aol.com (Dr. Slick) wrote:

Hello,

I've been interested in the Phase locked loop for some time
now, and something has always got me wondering.

Why do they have the 1/s (s is the complex variable in Laplace
and
is equal to jw) for the transfer function of the Voltage controlled
oscillator?

I understand that the Kvco is usually in MHz/volt, but could
someone explain why it has the 1/s? Which indicates that the transfer
function goes to infinity at DC (0 Hz)?

My guess today has been that the tuning voltage can be at a DC
voltage (like a single phase), and yet the phase of the output
continues to increase, which kinda implies that the Output phi/Input
phi gain is infinite.

Any educated comments?


Slick


Well, the 1/s is actually the transfer function of the VCO *and* the
phase detector, but they just blame it all on the VCO.

How's that? The 1/s term converts the VCO frequency to phase (the output
we're interested in); the phase detector responds to phase, which is the
system output after the 1/s term. The 1/s term is thus confined to the
VCO,
isn't it?

-- Mike --
It really depends on how you want to show your system. If you want the
block diagram to shows the _frequency_ as an output then the phase detector
needs to include an integrator. If you want the block diagram to show the
_phase_ as an output then the VCO would have the integrator. But whichever
way you do it the phase detector and the VCO combined have a 1/s.
 
On Wed, 17 Mar 2004 07:37:59 -0800, "Tim Wescott"
<tim@wescottnospamdesign.com> wrote:

It really depends on how you want to show your system. If you want the
block diagram to shows the _frequency_ as an output then the phase detector
needs to include an integrator. If you want the block diagram to show the
_phase_ as an output then the VCO would have the integrator. But whichever
way you do it the phase detector and the VCO combined have a 1/s.
Right. The wire from the VCO to the phase detector carries both
frequency and phase and, somehow, they manage to not interfere with
each other.

John
 
On Wed, 17 Mar 2004 10:00:11 -0800, John Larkin
<jjlarkin@highSNIPlandTHIStechPLEASEnology.com> wrote:

On Wed, 17 Mar 2004 07:37:59 -0800, "Tim Wescott"
tim@wescottnospamdesign.com> wrote:


It really depends on how you want to show your system. If you want the
block diagram to shows the _frequency_ as an output then the phase detector
needs to include an integrator. If you want the block diagram to show the
_phase_ as an output then the VCO would have the integrator. But whichever
way you do it the phase detector and the VCO combined have a 1/s.


Right. The wire from the VCO to the phase detector carries both
frequency and phase and, somehow, they manage to not interfere with
each other.

John
ROTFLMAO! John, You've been in really good form for several weeks now
;-)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

John "Peace for our Time" Kerry, Neville Chamberlain of this Century
 
I read in sci.electronics.design that John Larkin <jjlarkin@highSNIPland
THIStechPLEASEnology.com> wrote (in <ad4h50desr3mv5nc91dkftsmpljtaq4bbj@
4ax.com>) about 'Help with Laplace Transform for PLL VCO, Kvco?????', on
Wed, 17 Mar 2004:
Right. The wire from the VCO to the phase detector carries both
frequency and phase and, somehow, they manage to not interfere with each
other.
You have to use stranded wire, with at least two strands, of course.
--
Regards, John Woodgate, OOO - Own Opinions Only.
The good news is that nothing is compulsory.
The bad news is that everything is prohibited.
http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk
 
Allan Herriman <allan.herriman.hates.spam@ctam.com.au.invalid> wrote in message news:<n0lf501hk2iv8ksnih7o7aloa7mnvahr80@4ax.com>...
The VCO is an integrator! It helps if you think of the output *phase*
of the VCO rather than the output frequency. (Remember, this is a
*Phase* Locked Loop, and the all the variables in the analysis
represent either voltage, current or phase.)

1/s is (the transform of) an integrator.
Right. The phase is the integral of the frequency.



The transfer function does indeed go to infinity at DC. A DC input to
a VCO (= a constant control voltage) produces a fixed output
frequency, which is equivalent to a continuously ramping output phase.

As you noted, Kvco may be expressed in MHz/volt, but this could be
expressed as radian/second/volt, which should make it clear that the
output phase is proportional to the time integral of the input
voltage.
Ok, that's understood from here. A DC tuning voltage produces a
continuously ramping and increasing output phase, so the PHIout/PHIin
will
be infinite. I'll have to think about this.

I mean does this mean that if the tuning voltage is NOT DC (not 0
Hz, like the tuning voltage is a sine wave with frequency greater than
0Hz), then the phase gain will go down, at -20dB/decade, or
-6dB/octave, right?

ok, here's an important question: How do you measure the unity
gain frequency of the open loop? At this frequency, the phase angle
away from -180 degrees is the "phase margin".

In my mind, this is really just an example of the Barkhausen
Criteria, where at unity gain for a closed-loop system, the phase
shift must be 0 degrees or an intergral multiple of 2pi (positive
feedback). So for max stability, we have to keep the phase close to
180 deg. (negative feedback).



Slick
 
"John Woodgate" <jmw@jmwa.demon.contraspam.yuk> wrote in message
news:pppPshIrnJWAFw8c@jmwa.demon.co.uk...
I read in sci.electronics.design that John Larkin <jjlarkin@highSNIPland
THIStechPLEASEnology.com> wrote (in <ad4h50desr3mv5nc91dkftsmpljtaq4bbj@
4ax.com>) about 'Help with Laplace Transform for PLL VCO, Kvco?????', on
Wed, 17 Mar 2004:
Right. The wire from the VCO to the phase detector carries both
frequency and phase and, somehow, they manage to not interfere with each
other.

You have to use stranded wire, with at least two strands, of course.
oxygen free copper, for minimal signal degradation
 
"John Larkin" <jjlarkin@highlandSNIPtechTHISnologyPLEASE.com> wrote in
message news:0iif50dtlbk9gv1fhjgan4aoji2kpqf1v3@4ax.com...
| On 16 Mar 2004 18:44:09 -0800, radio913@aol.com (Dr. Slick) wrote:
|
| >Hello,
| >
| > I've been interested in the Phase locked loop for some time
| >now, and something has always got me wondering.
| >
| > Why do they have the 1/s (s is the complex variable in Laplace
| >and
| >is equal to jw) for the transfer function of the Voltage controlled
| >oscillator?
| >
| > I understand that the Kvco is usually in MHz/volt, but could
| >someone explain why it has the 1/s? Which indicates that the
transfer
| >function goes to infinity at DC (0 Hz)?
| >
| > My guess today has been that the tuning voltage can be at a DC
| >voltage (like a single phase), and yet the phase of the output
| >continues to increase, which kinda implies that the Output phi/Input
| >phi gain is infinite.
| >
| > Any educated comments?
| >
| >
| >Slick
|
|
| Well, the 1/s is actually the transfer function of the VCO *and* the
| phase detector, but they just blame it all on the VCO.
|
| Voltage into the VCO changes its frequency.
|
| But phase into the phase detector determines its output voltage.
|
| And phase is the integral (1/s) of frequency.
|
| Imagine the VCO and the reference oscillator being exactly identical
| in phase and frequency; the PD output is zero. Now change the VCO
| control voltage by a small step. The VCO frequency changes, the VCO
| phase begins to drift away from the ref osc phase, and the PD output
| becomes a linear ramp. A ramp is the integral of a step.
|
| John
|

No.... it is not.

The gain of the phase detector is K1 V/degree.

For a stable system at crossover the filter gain needs to be flat. Its
gain at this frequency is K2 V/V.

If the units are to remain consistant then the VCO requires a gain, when
in or close to lock, of K3 degrees/V.

The closed loop is dimensionless.

DNA
 
On Thu, 18 Mar 2004 00:03:53 -0000, "Emoneg" <Emoneg@nothere.com>
wrote:

| A ramp is the integral of a step.
|
| John
|

No.... it is not.
No? Then what is the integral of a step?

John
 
"John Larkin" <jjlarkin@highSNIPlandTHIStechPLEASEnology.com> wrote in
message news:6drh50l4d0c2gkb97qda773sm5gtn9posq@4ax.com...
| On Thu, 18 Mar 2004 00:03:53 -0000, "Emoneg" <Emoneg@nothere.com>
| wrote:
|
| >| A ramp is the integral of a step.
| >|
| >| John
| >|
| >
| >No.... it is not.
|
| No? Then what is the integral of a step?
|
| John
|
|

The area of the coressponding triangle

I think you have misssnipped

DNA
 
On Thu, 18 Mar 2004 00:37:59 -0000, "Emoneg" <Emoneg@nothere.com>
wrote:

"John Larkin" <jjlarkin@highSNIPlandTHIStechPLEASEnology.com> wrote in
message news:6drh50l4d0c2gkb97qda773sm5gtn9posq@4ax.com...
| On Thu, 18 Mar 2004 00:03:53 -0000, "Emoneg" <Emoneg@nothere.com
| wrote:
|
| >| A ramp is the integral of a step.
| >|
| >| John
| >|
|
| >No.... it is not.
|
| No? Then what is the integral of a step?
|
| John
|
|

The area of the coressponding triangle

I think you have misssnipped

DNA
DNA stumbles:

Impulse <> 1
Step <> 1/s
Ramp <> 1/s^2
etc.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

John "Peace for our Time" Kerry, Neville Chamberlain of this Century
 
"Jim Thompson" <thegreatone@example.com> wrote in message
news:htsh50dh8f9era90m76vjbtj6islphelv3@4ax.com...
| DNA stumbles:
|
| Impulse <> 1
| Step <> 1/s
| Ramp <> 1/s^2
| etc.
|
| ...Jim Thompson

Sigh

DNA
 
"Kevin Aylward" <kevindotaylwardEXTRACT@anasoft.co.uk> wrote in message
news:eFU5c.37$%G5.36@newsfep3-gui.server.ntli.net...
"quotes with no meaning, are meaningless" - Kevin Aylward.
I guess I'll just refrain from quoting that.

Walter.
 
On 17 Mar 2004 10:21:02 -0800, Dr. Slick wrote:

"Kevin Aylward" <kevindotaylwardEXTRACT@anasoft.co.uk> wrote in message news:<eFU5c.37$%G5.36@newsfep3-gui.server.ntli.net>...


Well, the 1/s is actually the transfer function of the VCO *and* the
phase detector, but they just blame it all on the VCO.

How's that? The 1/s term converts the VCO frequency to phase (the
output we're interested in); the phase detector responds to phase,
which is the system output after the 1/s term. The 1/s term is thus
confined to the VCO, isn't it?


Yep.


Ok, it's clear that this is NOT so clear to everyone else either!

The 1/s term also describes the reactance of a capacitor, like
1/sC, which tells you that at 0 Hz, the impedance is infinite.

How is this analogous to the VCO case? For the VCO, this 1/s
indicates that the transfer function goes to infinity at DC (0 Hz),
right?
In LaPlace land, 1/s is an integrator. That's what a capacitor does.

My guess today has been that the tuning voltage can be at a DC
voltage (like a single phase), and yet the phase of the output
continues to increase, which kinda implies that the Output phi/Input
phi gain is infinite.
There you go. As with a capacitor, the 1/s term is integration. Phase is
the integral of frequency.

-- Mike --
 
Dr. Slick wrote:

In my mind, this is really just an example of the Barkhausen
Criteria, where at unity gain for a closed-loop system, the phase
shift must be 0 degrees or an intergral multiple of 2pi (positive
feedback). So for max stability, we have to keep the phase close to
180 deg. (negative feedback).
Most loops are designed for a damping factor of 0.7 and this puts the
phase margin near 45 degrees- I don't think anyone has discovered a way
to achieve a rolloff to 0dB gain with 180 degree phase margin just
yet-unless the loop starts off at 0dB- a weak and useless loop. And you
seem to be confused about the phase shift of the control loop and the
output phase error- these are two different phases. The loop phase is an
analytical description of the phasing of the phase error feedback
correction and not the phase error itself- but that's okay- just don't
register a web page explaining your concept to the whole world as seems
to be the rule for many seriously confused individuals.
 
Emoneg wrote...
"Jim Thompson" <thegreatone@example.com> wrote ...
| DNA stumbles:
|
| Impulse <> 1
| Step <> 1/s
| Ramp <> 1/s^2
| etc.
|
| ...Jim Thompson

Sigh

DNA
Like ships passing in the night.

Thanks,
- Win

whill_at_picovolt-dot-com
 

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