getting least significant bits out of register

[rekz]

say I have the following:

reg[31:0] instruction;
reg[8:0] test;

and I want to assign test with the least 9 significant bits of the
register instruction, is there an easy way to do this using the assign?

 

[David Rogoff]

On 2010-02-03 19:01:50 -0800, rekz said:

say I have the following:

reg[31:0] instruction;
reg[8:0] test;

and I want to assign test with the least 9 significant bits of the
register instruction, is there an easy way to do this using the assign?

This is getting ridiculous. You've been asking some very elementary
questions here and people have been trying to be helpful. However, this
is just too much. If you have read any book or introductory website on
Verilog you would know how to do this in the first 20 minutes. It's
really not reasonable for you to be asking people to take time to
explain these very simple Verilog concepts to you when you do appear to
have taken the time to study the language yourself. This newsgroup is
an excellent source of information from many engineers with years and
years of experience, but you need to do some work on your own, too.

David

 

[rekz]

On Feb 3, 8:01 pm, rekz <aditya15...@gmail.com> wrote:

say I have the following:

reg[31:0] instruction;
reg[8:0] test;

and I want to assign test with the least 9 significant bits of the
register instruction, is there an easy way to do this using the assign?

would the following does it:

assign test = instruction[7:0];

 

[rekz]

On Feb 3, 8:24 pm, David Rogoff <da...@therogoffs.com> wrote:

On 2010-02-03 19:01:50 -0800, rekz said:

say I have the following:

reg[31:0] instruction;
reg[8:0] test;

and I want to assign test with the least 9 significant bits of the
register instruction, is there an easy way to do this using the assign?

This is getting ridiculous.  You've been asking some very elementary
questions here and people have been trying to be helpful. However, this
is just too much.  If you have read any book or introductory website on
Verilog you would know how to do this in the first 20 minutes.   It's
really not reasonable for you to be asking people to take time to
explain these very simple Verilog concepts to you when you do appear to
have taken the time to study the language yourself.  This newsgroup is
an excellent source of information from many engineers with years and
years of experience, but you need to do some work on your own, too.

 David

I've read some resources and that seems to be the way to do it.... I
just want to know if it's right

 

[Andy]

Try it and see!

Surely, trying it by simulating and/or synthesizing it in your toolset
is faster than waiting for answers from us.

If you try it a few times, and then don't understand what's going on
(some tools' error messages are less than helpful), then we're all
glad to help, but we need to believe you have done some homework on
this before we just give you point answers. Trust me, you will learn
much more by trying things yourself than being spoon-fed answers from
here.

Andy

 

[Cary R.]

rekz wrote:

On Feb 3, 8:01 pm, rekz <aditya15...@gmail.com> wrote:
say I have the following:

reg[31:0] instruction;
reg[8:0] test;

and I want to assign test with the least 9 significant bits of the
register instruction, is there an easy way to do this using the assign?

would the following does it:

assign test = instruction[7:0];

No, this does not assign the nine least significant bit of instruction
to test. I'll leave finding the error as an exercise for the OP.

Like others have said learning how to experiment with the language and
how to debug your design are critical skills that must be learned if you
want to be successful! Sometimes this can be painful, but it cannot be
learned by someone else telling you the answer.

Cary

 

[gabor]

On Feb 3, 10:08 pm, rekz <aditya15...@gmail.com> wrote:

On Feb 3, 8:01 pm, rekz <aditya15...@gmail.com> wrote:

say I have the following:

reg[31:0] instruction;
reg[8:0] test;

and I want to assign test with the least 9 significant bits of the
register instruction, is there an easy way to do this using the assign?

would the following does it:

assign test = instruction[7:0];

Questions for you. . .

Why would you think instruction[7:0] would supply the least
significant "9 bits"?

What would this do?

assign test = instruction;

Regards,
Gabor

 

[LittleAlex]

On Feb 4, 9:04 am, gabor <ga...@alacron.com> wrote:

On Feb 3, 10:08 pm, rekz <aditya15...@gmail.com> wrote:

On Feb 3, 8:01 pm, rekz <aditya15...@gmail.com> wrote:

say I have the following:

reg[31:0] instruction;
reg[8:0] test;

and I want to assign test with the least 9 significant bits of the
register instruction, is there an easy way to do this using the assign?

would the following does it:

assign test = instruction[7:0];

Questions for you. . .

Why would you think instruction[7:0] would supply the least
significant "9 bits"?

What would this do?

assign test = instruction;

Regards,
Gabor

How does one decide which bits of an instruction are significant? And
isn't it subjective which bits are more significant? For example, I
could contend that an addressing mode bit was more important than the
address portion, but others contend that the arithmetic selection bits
were more significant.

Frustrated by Xilinx's UCF syntax and looking for diversion,
AL.