M
M. Hamed
Guest
I'm probably on my fifth or sixth reread of the AoE FET chapter. At the end of the chapter, there is "Bad Circuit Ideas" section which I love because it gets you to think!
Now on page 173 figure 3.78D there is a JFET inverter with a PFET on the high side and NFET on the low side, and Vin goes from zero to +VDD. I reasoned that obviously it won't work because the FETs get forward biased.
However I thought what would happen if the FETs are reversed and the NFET is up and the PFET is down. It took me so long to understand the circuit even after simulating it, I had to think hard why it's behaving the way LTSpice says it should behave.
I think anyone who can try to predict the behavior of this circuit without simulation is someone who understands FETs so well.
But again, it could be that I'm just too much of a newbie
Now on page 173 figure 3.78D there is a JFET inverter with a PFET on the high side and NFET on the low side, and Vin goes from zero to +VDD. I reasoned that obviously it won't work because the FETs get forward biased.
However I thought what would happen if the FETs are reversed and the NFET is up and the PFET is down. It took me so long to understand the circuit even after simulating it, I had to think hard why it's behaving the way LTSpice says it should behave.
I think anyone who can try to predict the behavior of this circuit without simulation is someone who understands FETs so well.
But again, it could be that I'm just too much of a newbie