FPGA selection recommendation

[Theo Markettos]

Anssi Saari <as@sci.fi> wrote:

For a soft CPU a RISC-V might be reasonable and a Linux port exists even
if it's very new. RISC-V is an instruction set but as I understand it,
there are loads of free implementations on Github.

Do you know of any RISC-V cores on FPGA which are capable of booting Linux?
There's loads of microcontroller-class cores, but not many larger ones.

I've only seen Rocket, which is somewhat awkward to deal with, and LowRISC
which is an older version of Rocket (those folks are at the forefront of
suffering the pain of interfacing with Rocket). SiFive are shipping(ish)
silicon with Rocket in it. There's also PULP and various CPUs from IIT
Madras, but I'm not sure what state of completeness they're in.

In our experience with BERI (which is a 100MHz 64 bit CPU with caches and
MMU, but using the MIPS ISA and runs FreeBSD rather than Linux), it'll fit
on a 115K Cyclone IV but nothing much smaller.

Theo

 

[DJ Delorie]

Theo Markettos <theom+news@chiark.greenend.org.uk> writes:
> Do you know of any RISC-V cores on FPGA which are capable of booting Linux?

I've got a virtex-7 board running Fedora on a quad-core 64-bit RISC-V.
Is that big enough? ;-)

 

[Theo Markettos]

DJ Delorie <dj@delorie.com> wrote:

Theo Markettos <theom+news@chiark.greenend.org.uk> writes:
Do you know of any RISC-V cores on FPGA which are capable of booting Linux?

I've got a virtex-7 board running Fedora on a quad-core 64-bit RISC-V.
Is that big enough? ;-)

Which core are you using?

I don't think the V7 comes in QFP ;-)

Theo

 

[DJ Delorie]

Theo Markettos <theom+news@chiark.greenend.org.uk> writes:

I've got a virtex-7 board running Fedora on a quad-core 64-bit RISC-V.
Is that big enough? ;-)

Which core are you using?

It's the sifive freedom unleashed core, the U500.

> I don't think the V7 comes in QFP ;-)

Nope.

 

[Theo]

DJ Delorie <dj@delorie.com> wrote:

Theo Markettos <theom+news@chiark.greenend.org.uk> writes:
I've got a virtex-7 board running Fedora on a quad-core 64-bit RISC-V.
Is that big enough? ;-)

Which core are you using?

It's the sifive freedom unleashed core, the U500.

So that's based on Rocket. Thus far I only know about Rocket and PULP's
Ariane that are able to boot Linux.

I don't think the V7 comes in QFP ;-)

Nope.

Shucks Might be over the OP's budget anyway... by a factor of 100.

Theo

 

On Saturday, April 14, 2018 at 11:06:42 AM UTC-4, Piotr Wyderski wrote:

I need an FPGA chip with about 100 GPIO pins and capable of hosting a
CPU with an existing Linux port, mainly to run a web server. I would
like to connect it to a 16-bit DRAM, so there should exist a memory
controller with this feature, either a hard macro or a soft IP core.
There should also be a fast ethernet MAC. Nothing fancy, but:

1. This is for a small non-profit project, so the IP cores must be free.
Paying O(500) bucks for a Nios/MicroBlaze license is out of the
question. Ditto about the MAC. As far as I know, neither Xiling nor
Altera have a free/very cheap licensing option for non-profit
applications, so the most obvious way is a no-go. Are there any
*reasonable* open CPU/MAC/memory controller cores to use instead?
$1000 per year is extremely cheap for commercial purposes, but
a showstopper for hobby applications, where you can buy a bucket
of STM32-class chips.

2. The chip must be hand-solderable and introduce no thermal strain
problems. This excludes the BGA/chip scale packages and leaves only
the QFP variants on the table. I don't care about the superior
signal integrity benefits of the leadless packages, 50MHz is more
than needed. But this requirement kills Zynq/Cyclone V, otherwise
a perfect choice for this application. The PCB must be manufacturable
in a cheap PCB shop and they can often do at most 4 layers.

3. The FPGA must be SRAM-based.

4. I don't want the SOM modules.

The older Spartan 3Es (3S500E) or equivalent Cyclone 3 in PQFP208
would have been aa good choice here, but I seem to be blocked by
the licenseing issues. I'd gladly stick to these platforms, but
could you please recommend me any robust open-source IP cores
which fit inside this class of FPGAs?

I read much of the thread but not all. I don't think I have anything meaningful to add to the discussion as asked by the OP. I do feel his pain about the available packages for FPGAs. My desire is to have FPGA devices that are similar in package and utility to smaller MCUs including price competitiveness. I don't care about hand soldering since that is of no economic value and I am in business. My interest in using leaded or no-lead devices rather than BGA type packages is convenience and the cost of PWBs. While the larger BGAs often have wider pin pitches and so are not difficult to route with relaxed design rules, they are big and expensive mitigating the point of using low cost PWBs. Smaller pin count packages at a lower unit price use much finer ball pitches and require the most expensive PWB processing.. As a result there are no $10 FPGA boards available much less $5 FPGA boards even though there are a number of FPGAs well below this price.

I recall having conversations here with Xilinx representatives about the cost basis for FPGAs and often the die size was pin count limited. So the smallest devices were fairly large by some standards. Lattice is the only FPGA company I am aware of that makes devices that only have a couple dozen I/Os or less across all packages. Because of the market for these devices they end up in microscopic packages that are not practical for low cost production unless very high volumes are produced.

Rick C.