D
David Brown
Guest
On 27/03/2012 13:10, Bill Valores wrote:
to keep overhead to an absolute minimum is an easy job in Linux. (If
you don't want to think about ARP, IP addresses, etc., why not force the
FPGA to have MAC address 1, and the dedicated PC interface to have MAC
address 2 - then send packets with nothing but the Ethernet frame overhead.)
It also means that the data packets won't have to compete for bandwidth
with other things Windows will want to send over the interface, such as
broadcasts scanning for network shares, ARP requests, or (if you are not
careful) malware sending out spam...
Is Windows a requirement? Dealing with things like raw Ethernet packetsHello all,
My team needs to design our own piece of testing equipment for our
project. I'll spare you the gory details, and just say that we will
need to collect data at some 20 Mbyte/sec (possibly continuously) and
somehow get it to a PC computer running Windows. A fancy GUI
application will then present this to the operator. A similar link is
necessary in the other direction for signal injection.
The FPGA does some data processing, so we can't just buy a data
capture card. We may consider a capturing card to interface with the
FPGA digitally.
So my question is: What's your recommendation for the PC-FPGA
communication? Given a fairly skilled engineering team and a
management that understands this is not a cheap quickie (but still
wants to keep costs and efforts at a minimum, of course) what would
you suggest? USB? PCIe? Ethernet? Capture data from debug pins?
Something else?
And: Can anyone give me an idea about what we're up against (costs and
time) based upon experience?
Purchasing equipment and IP cores is fine as long as the costs can be
justified in terms of saved engineering time. It's our own salaries
weighted against spending the money on products (with due risk
calculations and stuff).
Thanks in advance,
Bill
to keep overhead to an absolute minimum is an easy job in Linux. (If
you don't want to think about ARP, IP addresses, etc., why not force the
FPGA to have MAC address 1, and the dedicated PC interface to have MAC
address 2 - then send packets with nothing but the Ethernet frame overhead.)
It also means that the data packets won't have to compete for bandwidth
with other things Windows will want to send over the interface, such as
broadcasts scanning for network shares, ARP requests, or (if you are not
careful) malware sending out spam...