Eagle vs Protel

[Joerg]

Hello Spehro,

I haven't seen Protel in a long time. Cadence I saw only once and that
was a company that designs mostly CMOS chips, not boards.

Orcad is owned by Cadence now.

Yes, but they seem to be keeping the two lines somewhat separated. Kind
of like Lexus and Toyota.

Regards, Joerg

http://www.analogconsultants.com

 

[Joerg]

Hello Spehro,

Orcad is owned by Cadence now.

Who knows, maybe that is the reason why Capture supposedly costs more
than $1700 now. I paid $495 for my license a long time ago. That was a
good deal but more than $1000 just for drawing schematics? Nah.

Regards, Joerg

http://www.analogconsultants.com

 

[John Larkin]

On Tue, 16 Aug 2005 23:08:40 -0400, keith <krw@att.bizzzz> wrote:

On Mon, 15 Aug 2005 10:23:25 -0700, John Larkin wrote:

On Mon, 15 Aug 2005 09:43:58 -0700, Bob Stephens <roberts@dcxchol.com
wrote:

On Mon, 15 Aug 2005 09:03:52 -0700, John Larkin wrote:

On Mon, 15 Aug 2005 16:34:11 +0100, "Wilhelm Lehmann"
wilhelm@iseek.co.za.i.dont.want.spam> wrote:

Hi,

I am up to the point where I must now purchase my PCB software because the
complexity of the boards exceed the capabilities of Eagle Lite. (ie can only
do double sided boards of limited size)

I see there are a few posts about Protel, and I was wondering if I can have
some coments about the two. As to what I should invest in. (keeping in mind
I know eagle quite well)

For starters Eagle don't have auto placement of components, but the auto
router works great.


Auto placement is unnecessary, and doesn't work well even in high-end
versions, and makes ugly boards. People are better at this. Hell,
people are better at routing.

John

I agree. I can't comment on the high end stuff, but AutoPlacement in Protel
is worse than useless.


If you use a bunch of FPGAs or RAMs, placement interacts with pin
assignments and bussing strategies, and that's iterative. Then there
are thermal/ground loop/isolation/pour/bypassing/impedance and lots of
other issues. Software isn't any good at this. Besides, this part is
fun.

At least the high end FPGAs have lotsa routing resources these days.
Designing the FPGA to make the board simple is the best way to at least
start. If the FPGA gets strangled then push IOs around.

We've had - so far - 100% success with pre-assigning the pins on
Xilinx chips to optimize pcb layout. But the fastest we've clocked is
77 MHz, and that's not screaming these days.

You haven't done complicated enough boards. ;-) I've seen many that
couldn't be hand routed with 10x the personel. Boards measuring in the
high-digit square feet, with fifty to a hundred layers, all packed to the
gills. Only overflows (perhaps hundreds to thousands) were hand routed.
Many of those overflows were done with surface wiring (twisted pair).

That makes me shiver just to think about it. What needs such density?
And how much does such a bare board cost?

100 layers must have interesting impedance and signal-quality issues.
How thick?

Chips aren't hand routed these days either, except when there is no other
way to meet timing (BTDT-GTS). Do you hand place-n-route your FPGAs?

Only rarely, in a critical timing bit, usually to meet pin-pin prop
delay requirements, not to get it to work as such. But usually we play
with the design (pipelining, logic depth, fanouts) to get the speed we
need.

Boards have been known to be just as complicated.

Not in my life, thank goodness.

John

 

[John Larkin]

On Wed, 17 Aug 2005 00:59:16 GMT, Joerg
<notthisjoergsch@removethispacbell.net> wrote:

Hello Chris,

Something else to consider is that Protel and Orcad are pretty much the
industry standard tools, depending on which part of the world you do
business in. Unless you design motherboards or complex microwave stuff,
one of those two packages is likely to be your tool of choice.

In the western US I would think the de facto standard is OrCad. If
Cadsoft would advertise more they could capture more market share.

Regards, Joerg

http://www.analogconsultants.com

We use PADS. It has the best schematic entry of anything I've used, by
far. It's nice to drive and very solid.

John

 

[John Woodgate]

I read in sci.electronics.design that Joerg
<notthisjoergsch@removethispacbell.net> wrote (in
<cnKMe.243$GV7.16@newssvr25.news.prodigy.net&gt about 'Eagle vs Protel',
on Wed, 17 Aug 2005:

Yes, but they seem to be keeping the two lines somewhat separated. Kind
of like Lexus and Toyota.

Let's hope the drivers do the same!
--
Regards, John Woodgate, OOO - Own Opinions Only.
There are two sides to every question, except
'What is a Moebius strip?'
http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk

 

[Keith Williams]

In article <gqs6g19nvdkssda55iku298dj4ah3o3o7o@4ax.com>,
jjlarkin@highNOTlandTHIStechnologyPART.com says...

On Tue, 16 Aug 2005 23:08:40 -0400, keith <krw@att.bizzzz> wrote:

On Mon, 15 Aug 2005 10:23:25 -0700, John Larkin wrote:

On Mon, 15 Aug 2005 09:43:58 -0700, Bob Stephens <roberts@dcxchol.com
wrote:

On Mon, 15 Aug 2005 09:03:52 -0700, John Larkin wrote:

On Mon, 15 Aug 2005 16:34:11 +0100, "Wilhelm Lehmann"
wilhelm@iseek.co.za.i.dont.want.spam> wrote:

Hi,

I am up to the point where I must now purchase my PCB software because the
complexity of the boards exceed the capabilities of Eagle Lite. (ie can only
do double sided boards of limited size)

I see there are a few posts about Protel, and I was wondering if I can have
some coments about the two. As to what I should invest in. (keeping in mind
I know eagle quite well)

For starters Eagle don't have auto placement of components, but the auto
router works great.


Auto placement is unnecessary, and doesn't work well even in high-end
versions, and makes ugly boards. People are better at this. Hell,
people are better at routing.

John

I agree. I can't comment on the high end stuff, but AutoPlacement in Protel
is worse than useless.


If you use a bunch of FPGAs or RAMs, placement interacts with pin
assignments and bussing strategies, and that's iterative. Then there
are thermal/ground loop/isolation/pour/bypassing/impedance and lots of
other issues. Software isn't any good at this. Besides, this part is
fun.

At least the high end FPGAs have lotsa routing resources these days.
Designing the FPGA to make the board simple is the best way to at least
start. If the FPGA gets strangled then push IOs around.


We've had - so far - 100% success with pre-assigning the pins on
Xilinx chips to optimize pcb layout. But the fastest we've clocked is
77 MHz, and that's not screaming these days.

I did 200MHz in a Virtex-E assigning pins to optimize the PCB (I/Os
directly adjacent to the driving/driven chip). I figured that the PCB
timing was a worse problem than the FPGA routing resources. ..besides,
I had to start somewhere. ;-)

You haven't done complicated enough boards. ;-) I've seen many that
couldn't be hand routed with 10x the personel. Boards measuring in the
high-digit square feet, with fifty to a hundred layers, all packed to the
gills. Only overflows (perhaps hundreds to thousands) were hand routed.
Many of those overflows were done with surface wiring (twisted pair).

That makes me shiver just to think about it. What needs such density?

'90s mainframe processor and channel boards.

And how much does such a bare board cost?

I never saw the costs, and would be suspect of any costs I did see.
The widget they're going in sold for upwards of $25M (six or eight
processors, with all the chrome and channels ;.

100 layers must have interesting impedance and signal-quality issues.
How thick?

I don't remember the thickness. I only worked on one side. ;-)
Impedance was very tightly controlled though. High speed board-to-
board wiring was either done in Gore-Tex trilead (G-S-G sort of
twinlead) or coax. ...all 80ohm, IIRC.

Chips aren't hand routed these days either, except when there is no other
way to meet timing (BTDT-GTS). Do you hand place-n-route your FPGAs?

Only rarely, in a critical timing bit, usually to meet pin-pin prop
delay requirements, not to get it to work as such. But usually we play
with the design (pipelining, logic depth, fanouts) to get the speed we
need.

That's I/Os. How about the logic inside? ;-) I loan myself out to the
timing group sometimes when I have less to do than I want. The design
is done, "your job, should you choose to accept" is to defy the
synthesis tools and make timing, using nothing but bubblegum and fence
wire.

Boards have been known to be just as complicated.

Not in my life, thank goodness.

They still are, except the complication has moved somewhat from density
(that goes on the chips) to timing and skew analysis. With busses
humping along at 1GHz (in consumer products, even), there isn't much
slop thrown in for these things. I'm amazed that PCs work at all.

--
Keith

 

[Joerg]

Hello John,

We use PADS. It has the best schematic entry of anything I've used, by
far. It's nice to drive and very solid.

A lot of layouters seem to use that as well. But when I saw PADS2004
starting at $3,495 I passed on it. Even the full blown Eagle pro package
costs only fraction of that and has plenty of horse power.

Regards, Joerg

http://www.analogconsultants.com

 

[Joerg]

Hello John,

100 layers must have interesting impedance and signal-quality issues.
How thick?

Probably you'd need someone on the other side if you want to install a
thru-hole part. "Can see it, push some more, yep, coming though". Then
fire up the blow torch to preheat the rather long via.

That looks like some gvt project where cost is less of an objective or
maybe some scientists had to live their dream ;-)

Regards, Joerg

http://www.analogconsultants.com

 

[Rich Grise]

On Wed, 17 Aug 2005 10:34:30 -0700, John Larkin wrote:

On Tue, 16 Aug 2005 23:08:40 -0400, keith <krw@att.bizzzz> wrote:
....
You haven't done complicated enough boards. ;-) I've seen many that
couldn't be hand routed with 10x the personel. Boards measuring in the
high-digit square feet, with fifty to a hundred layers, all packed to the
gills. Only overflows (perhaps hundreds to thousands) were hand routed.
Many of those overflows were done with surface wiring (twisted pair).

That makes me shiver just to think about it. What needs such density?
And how much does such a bare board cost?

100 layers must have interesting impedance and signal-quality issues.
How thick?

John, I believe you've been trolled. I've filtered "keith" many moons ago,
as he's nothing but a Turing bot.

Thanks,
Rich

 

[John Larkin]

On Wed, 17 Aug 2005 21:57:32 GMT, Rich Grise
<eatmyshorts@doubleclick.net> wrote:

On Wed, 17 Aug 2005 10:34:30 -0700, John Larkin wrote:

On Tue, 16 Aug 2005 23:08:40 -0400, keith <krw@att.bizzzz> wrote:
...
You haven't done complicated enough boards. ;-) I've seen many that
couldn't be hand routed with 10x the personel. Boards measuring in the
high-digit square feet, with fifty to a hundred layers, all packed to the
gills. Only overflows (perhaps hundreds to thousands) were hand routed.
Many of those overflows were done with surface wiring (twisted pair).

That makes me shiver just to think about it. What needs such density?
And how much does such a bare board cost?

100 layers must have interesting impedance and signal-quality issues.
How thick?

John, I believe you've been trolled. I've filtered "keith" many moons ago,
as he's nothing but a Turing bot.

A little light trolling isn't bad. 100 layers is an awesome concept.
The most I've ever done is 8.

John

 

[Joerg]

Hello John,

A little light trolling isn't bad. 100 layers is an awesome concept.
The most I've ever done is 8.

I have done 12 but that was already an unwieldy beast. 3mm thick or so.
You could park a truck on it without breaking.

Regards, Joerg

http://www.analogconsultants.com

 

[John Larkin]

On Thu, 18 Aug 2005 01:00:08 GMT, Joerg
<notthisjoergsch@removethispacbell.net> wrote:

Hello John,

A little light trolling isn't bad. 100 layers is an awesome concept.
The most I've ever done is 8.

I have done 12 but that was already an unwieldy beast. 3mm thick or so.
You could park a truck on it without breaking.

Regards, Joerg

http://www.analogconsultants.com

If you stick at 0.062 overall thickness, at around 10 layers the
dielectrics get so thin that the impedance of a 8 mil trace starts to
get unusably low. So you have to bail from FR-4 and use something with
lower dielectric constant. And then the cost queues up for takeoff.

Ugh.

John

 

[keith]

On Wed, 17 Aug 2005 16:41:40 -0700, John Larkin wrote:

On Wed, 17 Aug 2005 21:57:32 GMT, Rich Grise
eatmyshorts@doubleclick.net> wrote:

On Wed, 17 Aug 2005 10:34:30 -0700, John Larkin wrote:

On Tue, 16 Aug 2005 23:08:40 -0400, keith <krw@att.bizzzz> wrote:
...
You haven't done complicated enough boards. ;-) I've seen many that
couldn't be hand routed with 10x the personel. Boards measuring in the
high-digit square feet, with fifty to a hundred layers, all packed to the
gills. Only overflows (perhaps hundreds to thousands) were hand routed.
Many of those overflows were done with surface wiring (twisted pair).

That makes me shiver just to think about it. What needs such density?
And how much does such a bare board cost?

100 layers must have interesting impedance and signal-quality issues.
How thick?

John, I believe you've been trolled. I've filtered "keith" many moons ago,
as he's nothing but a Turing bot.

You can't understand engineering. That fact is as plain as the dick on

your face.

A little light trolling isn't bad. 100 layers is an awesome concept. The
most I've ever done is 8.

Crap, I did an 8x11" ten-layer "PCI" card (.062 thick). It was over-sized
because it didn't all fit on the table. It also needed to stick out of
the frame because it was a test system (replacing DUTS inside the server
system would be a PITA)). The vendor (Sanmina SCI, now) had no issues with
any of the manufacturing or impedance control. PCBs are nothign new.

 

[keith]

On Wed, 17 Aug 2005 18:14:56 -0700, John Larkin wrote:

On Thu, 18 Aug 2005 01:00:08 GMT, Joerg
notthisjoergsch@removethispacbell.net> wrote:

Hello John,

A little light trolling isn't bad. 100 layers is an awesome concept.
The most I've ever done is 8.

I have done 12 but that was already an unwieldy beast. 3mm thick or so.
You could park a truck on it without breaking.

Regards, Joerg

http://www.analogconsultants.com

If you stick at 0.062 overall thickness, at around 10 layers the
dielectrics get so thin that the impedance of a 8 mil trace starts to
get unusably low. So you have to bail from FR-4 and use something with
lower dielectric constant. And then the cost queues up for takeoff.

Nope. The .062" card I did five years ago had three 50ohm layers, two 75
ohm, and five power. Though the traces were 6x6mil (IIRC), there wasn't a
single problem. The high-speed (200MHz) stuff was all confined to the
inner planes, with no vias except at the B/FGAs.

Ugh.

It really isn't all that bad, given a real manufacturing partner. The
only thing they screwed up was the impedance on the LVPECL clock lines.
They forgot the difference between differential impedance and
single-ended. A quick substitution of a few terminators (which they
covered) made the problems go away. It wasn't a product, so...

--
Keith

--
Keith

 

[keith]

On Wed, 17 Aug 2005 21:57:32 +0000, Rich Grise wrote:

On Wed, 17 Aug 2005 10:34:30 -0700, John Larkin wrote:

On Tue, 16 Aug 2005 23:08:40 -0400, keith <krw@att.bizzzz> wrote:
...
You haven't done complicated enough boards. ;-) I've seen many that
couldn't be hand routed with 10x the personel. Boards measuring in the
high-digit square feet, with fifty to a hundred layers, all packed to the
gills. Only overflows (perhaps hundreds to thousands) were hand routed.
Many of those overflows were done with surface wiring (twisted pair).

That makes me shiver just to think about it. What needs such density?
And how much does such a bare board cost?

100 layers must have interesting impedance and signal-quality issues.
How thick?

John, I believe you've been trolled. I've filtered "keith" many moons ago,
as he's nothing but a Turing bot.

Stick to your toys, kid. I have >30 years in the biz.

--
Keith

 

[John Larkin]

On Wed, 17 Aug 2005 22:57:07 -0400, keith <krw@att.bizzzz> wrote:

If you stick at 0.062 overall thickness, at around 10 layers the
dielectrics get so thin that the impedance of a 8 mil trace starts to
get unusably low. So you have to bail from FR-4 and use something with
lower dielectric constant. And then the cost queues up for takeoff.

Nope. The .062" card I did five years ago had three 50ohm layers, two 75
ohm, and five power. Though the traces were 6x6mil (IIRC), there wasn't a
single problem. The high-speed (200MHz) stuff was all confined to the
inner planes, with no vias except at the B/FGAs.

Well, you must live in a universe with different physical constants
than the one I inhabit.

John

 

[Robert Latest]

On Wed, 17 Aug 2005 00:43:28 GMT,
Joerg <notthisjoergsch@removethispacbell.net> wrote
in Msg. <QKvMe.85$zD3.4@newssvr29.news.prodigy.net>

Err, not necessarily. Almost all my clients use OrCad, small, medium and
large companies. I switched to Eagle when they started jacking up the
prices. Except for the lack of hierarchical design I didn't find
anything I'd miss from my OrCad days. Oh, and what bugs me a little is
that Eagle uses "cut" where every other program says "copy". But that's
a minor inconvenience, like having to drive in lefthand traffic.

What annoys me is that Eagle doesn't have a central package repository.
I.e., every library drags around its own version of a SO16 package, and
if you want to change something you have to do it in all the lbrs.

I created my own "central" package repository from which I drag
everything into the individual libraries, but that's just what it is --
a drag.

That said, Eagle is one of the most stable and reliable pieces of
GUI software I've ever dealt with.

robert

 

[Ban]

Robert Latest wrote:

That said, Eagle is one of the most stable and reliable pieces of
GUI software I've ever dealt with.

robert

It sometimes crashes when I have grouped many parts and want to move them
together. It is advisable to save before such a command.
--
ciao Ban
Bordighera, Italy

 

[Keith Williams]

In article <ufv7g1pko7it0o8spuals2kn43eja92dt3@4ax.com>,
jjlarkin@highNOTlandTHIStechnologyPART.com says...

On Wed, 17 Aug 2005 22:57:07 -0400, keith <krw@att.bizzzz> wrote:



If you stick at 0.062 overall thickness, at around 10 layers the
dielectrics get so thin that the impedance of a 8 mil trace starts to
get unusably low. So you have to bail from FR-4 and use something with
lower dielectric constant. And then the cost queues up for takeoff.

Nope. The .062" card I did five years ago had three 50ohm layers, two 75
ohm, and five power. Though the traces were 6x6mil (IIRC), there wasn't a
single problem. The high-speed (200MHz) stuff was all confined to the
inner planes, with no vias except at the B/FGAs.


Well, you must live in a universe with different physical constants
than the one I inhabit.

I don't think so, but perhaps. I have the existence theorem on my side

though. ;-)

--
Keith

 

[Joerg]

Hello Robert,

What annoys me is that Eagle doesn't have a central package repository.

OrCad used to have that but this can create more problems than
desirable. You modify a part and suddenly some of the old schematics
don't work anymore because they pick from that repositoiry when loading.
I like Eagle's approach better and IIRC OrCad is now similar in that
respect. In the end the library has to be part of the schematic.

...

That said, Eagle is one of the most stable and reliable pieces of
GUI software I've ever dealt with.

I do have a few quirks with it. Often it won't print. Nada, zilch, no
error message, nothing. Then you have to either reload or
deselect-select the printer and (sometimes) it decides that it will now
print.

Haven't had it crash yet like Ban did. But that doesn't mean it couldn't
happen here as well. So I do save every few minutes.

Regards, Joerg

http://www.analogconsultants.com