Driving 555 IC with a pulse stream

[Jag Man]

Thanks, John. I may have misled you though, as I actually have an NPN (NTE
123AP) transistor
between the 4017 and the 555. E.g., pin 2 (a decoded output) of the 4107
goes a 10K resistor, thence
to the base of the transistor. Another 10k resistor connects the base to
ground. The collector
goes to pin 2 of the 555, and the emitter is grounded. Pin 2 is also
connected through a 10k
resistor to +12. This is to present pin 2 with a negative pulse, which is
the way
I've triggered 555 in other projects.

So, does the analysis still hold?

Ed

---
No, it's actually pretty slick!

What's happening is that when the 4017 output goes low it
unconditionally resets the 555, discharging the timing cap, then when
it goes high and it gets to about 0.7V it releases the reset and drags
the trigger pin high along with it. Now, since the trigger pin will be
at less than about 1/3 Vcc when the 555 comes out of reset, the output
will go high and the 555 will start timing out. What's slick is that
it's only going to take ever how long it takes for the counter's
output to get to higher than 1/3 Vcc to not be triggering the 555 any
more, and then the 555 will time out during the time the counter's
output is high.

__________ __________ ______
4017 OUT __________| |__________| |__________|
_____ __________ __________ ______
RESET __________| |__________| |__________|
____ __________ __________ ______
TRIG __________| |__________| |__________|
_ _ _
555 OUT ___________| |___________________| |___________________| |___

-->||<--- effective trigger pulse width


--
John Fields

 

[Jag Man]

Thanks again, Bill. Just out of curiosity, though, why does it work
when I simply connect pin 4 to the same voltage seen by pin 2? That
is, connected this way the output of the 555 can indeed be set shorter
than the pulse width at 2/4. Curious.

Ed




"Bill Bowden" <wrongaddress@att.net> wrote in message
news:ad025737.0411222148.1bcc8640@posting.google.com...

"Jag Man" <Jag_Man653R-E-MOVE@hotmail.com> wrote in message
news:<kU4md.21509$6q2.21047@newssvr14.news.prodigy.com>...
Thanks, Bill.

Actually, what I have been trying is close to what you suggest.
I'm using a 2N3094 and 10k resistors instead of 5.1k,
but no capacitor. In that configuration, with the RESET at 12 v,
I can't seem to get the output pulse any shorter than the incoming
pulse.
However, I've now learned that by connecting the RESET pin
to the triggering pulse (i.e., same as pin 2) it seems to work.

Not sure what the capicitor would do.

Ed

No, you can't get it any shorter because the
transistor is holding the trigger (pin 2)
at a low level during the entire input time,
and the 555 output will not return low until the
trigger line goes back up.

If you use the capacitor, the transistor will
only turn on during the time it takes to charge
the capacitor, so you get a very short pulse at
pin 2 and the 555 output will end earlier determined
by the R and C parts at pin 6.

Try the capacitor to see what happens. You can
try different values of .1uF, .047uF, 0.01uF, etc.

There is also a mistake in the other post as John
Fields pointed out. The reset line (pin 4) will
reset the 555 output to a low state when it is
connected to ground. So it normally connects to
+V for the 555 to operate.

-Bill



The reset pin is active low but it doesn't need to
be used. Just connect it to +V. (corrected version)

The 4017 pulse is probably positive going, and the
555 needs a negative going edge, so you will need
a NPN transistor to invert the pulse and a cap
to trigger the 555 on the leading edge. Something
like the drawing, but you may also need a diode from
the transistor base to GND if the input is more than
6 volts.

+V
|
\ 555
/ +------+
5.1K \ | |
| | 3|--> Out
+--------|2 |
C | |
0.01uF |/ +------+
In --/\/\/---| |--+--B| NPN
5.1K C | |\
\ E
5.1K / |
\ |
| |
GND GND

-Bill

 

[John Fields]

On Sat, 27 Nov 2004 00:50:10 GMT, "Jag Man"
<Jag_Man653R-E-MOVE@hotmail.com> wrote:

Thanks again, Bill. Just out of curiosity, though, why does it work
when I simply connect pin 4 to the same voltage seen by pin 2? That
is, connected this way the output of the 555 can indeed be set shorter
than the pulse width at 2/4. Curious.

When the driving signal pulls RESET and TRIGGER both low at the same
time, RESET will dominate and the output pf the 555 will go low
unconditionally. Then when the driving signal starts going high, it
will release the reset when it climbs through about 0.7V (1.2V max).
When the reset is released the driving signal will still be below
2/3Vcc, so it will trigger the chip, forcing the output high and
starting the charging of the timing cap. Then, when the driving
signal goes higher than 2/3Vcc, the trigger will be released and the
555 will time out according to the values of the timing resistor and
capacitor. What's interesting about triggering the 555 this way (for
your application) is that there's no need to cap couple to the trigger
input since you want the thing to start and finish timing out when the
RESET/TRIGGER signal goes high. What you _do_ have to be careful
about, though, is that your input signal doesn't go low while the 555
is timing out. But, for your application, I don't think that can
happen.

--
John Fields

 

[Robert Monsen]

Jag Man wrote:

Thanks again, Bill. Just out of curiosity, though, why does it work
when I simply connect pin 4 to the same voltage seen by pin 2? That
is, connected this way the output of the 555 can indeed be set shorter
than the pulse width at 2/4. Curious.

Ed

John Fields explained this a few messages back, but it's been expunged
from my server.

It has to do with the fact that the reset pin is active low. So, when
the input (connected to pins 2 and 4) is low, the chip is in reset, to
the output is also low. When it starts to rise, the point at which the
chip comes out of reset is apparently still below the point where the
trigger activates. Thus, the output comes up for a single monostable cycle.

Lowering the input back to 0 may cause the reset to be engaged before
the trigger, which would mean the output would stay at 0. Even if it
doesn't, the reset will quickly stop any output (ie, it might glitch for
a very short while as the input goes down from 5V to 0V). You can filter
out the glitch if it occurs using an RC lowpass filter.

--
Regards,
Robert Monsen

"Your Highness, I have no need of this hypothesis."
- Pierre Laplace (1749-1827), to Napoleon,
on why his works on celestial mechanics make no mention of God.