Driver to drive?

[Don Y]

Hi Martin,

On 11/20/2014 7:37 PM, Martin Riddle wrote:

On Wed, 19 Nov 2014 14:02:53 -0700, Don Y <this@is.not.me.com> wrote:

I'm reviewing stats for some execution times (which imply data transfer
rates) of some utilities I'd run previously on laptops and, from that,
see what I can only attribute to lousy disk subsystem performance.

Granted, laptop drives tend to be less performant simply because
of power and space considerations (and, the Windows disk access
patterns). And, of course, laptops are all over the map in terms
of price/performance.

But, what sort of unbuffered,[1] single sector performance are you
likely to encounter in that environment? E.g., a desktop disk can
easily saturate a 100Mb link -- or a USB2 PCI i/f. I'm not sure
that is true with many (?) laptop drives...

I realize the 2.5" form factor (nor the PATA/SATA distinction)
should arbitrarily limit performance (though low RPMs can). E.g.,
I have some 2.5" drives that will do 300MB/s easily (though run
very warm and draw twice the power of "typical" drives)

[1] Of course, all disk accesses are buffered -- in several places.
My point is "without taking explicit and extraordinary measures"...

As pointed out most consumer drives are ~40Mbs.
I have a WD blue 160G PATA, I see ~45Mbs.

"See" when doing *what*? I.e., I was looking for "unbuffered,[1] single
sector performance". So, the cost of the disk *subsystem* is reflected,
not just the disk itself. I want to get a feel for how much I have
to do to get this out of the "critical path" and shift the performance
issue to CPU-bound issues.

And, with "typical" laptops, not laptops tuned for specific performance,
etc.

I also have a WD Scorpio Black, I see ~100Mbs on a 3yr old acer i5.
My PATA laptop is now using a PATA to MSATA converter and maxes out at
90Mbs with a Msata SSD.

I've come to the conclsion that drives with a good 4k cluster size
transfer rate get high ratings, like the samsung SSD drives. THeir 4k
transfer rates are higher than average, but not by much.

NTFS by default uses 4k Clusters.

 

[legg]

On Thu, 20 Nov 2014 19:16:49 -0500, rickman <gnuarm@gmail.com> wrote:

On 11/20/2014 4:29 PM, legg wrote:
On Thu, 20 Nov 2014 11:36:06 -0500, rickman <gnuarm@gmail.com> wrote:

On 11/20/2014 11:28 AM, Tim Williams wrote:
"legg" <legg@nospam.magma.ca> wrote in message
news:26qr6a9nfcf0dehq7rotu3tpc4an1jq24g@4ax.com...
Similar complexity is present in semiconductor large scale integration
or optical interfaces. It's there, but you just don't notice it except
perhaps as a more frequent junking of some device that used to last
for decades.

Some applications simply defy miniaturization. Some will never last
long enough to justify the effort. The first attempt is often the
end-run, trying to avoid the need for so many individual terminations.

Compactrons come to mind.

I've got to imagine tubes could be pretty slick these days with MEMS.

If they had MEMS back in the day, they could've done some really neat
stuff, integrated TV receiver - demodulator - chroma separator, say.

Of course... "neat stuff" would include transistors, so we'd still be
where we are today without the glowbugs. :^)

I seem to recall there was a UK company with a plan to produce a pre-LCD
display using very pointy field emitters. I can't recall if they were
etched in Si, or what. Is that the sort of thing you are referring to
with MEMS tubes?

I believe this company never shipped a commercial product.

You're possibly thinking of field emission triodes and arrays. I
believe the issue was with erosion of the emitter (even with vapor
deposited diamond surfaces). They were etched in Si, GaAs and InP.
Not much published after Y2K.

Field emission was also a consideration for Ion Propulsion thrusters.

Wikipedia to the rescue.

http://en.wikipedia.org/wiki/Field_emission_display

They describe it as being printed but to mention the need for a higher
vacuum than is used in a CRT. As to who was doing the development, I
may well be confusing Sir Clive Sinclare's flat CRT with this display.
The wiki article does not say anyone ever produced a commercial product
using this technology.

Motorola relesed a 5inch part for an RGB development platform in '98.
(Pixtek?) and Futaba released a monochrome version about the same
time.
20,000hr life might be OK as an FRU in aircraft, but I don't
know.....

RL

 

[rickman]

On 11/20/2014 10:49 AM, Joerg wrote:

rickman wrote:

The corner frequency I thought I was calculating would be the point
where the impedance of the bypass cap becomes large enough to impact the
gain of the FET with is more about the drain resistor than the source
resistor.


Corner frequency really does not matter here. Just calculate it so the
60kHz is in the flat part. 0.022uF is a good start, assuming you don't
intend to listen to anything below 20kHz. VLF reception would be another
story.

If you want more repeatable and flat gain you'd have to place resistors
in series with C1 and C3. Of course that will lower overall gain.

Wait a minute. Either I calculate the corner frequency or I don't... lol

I think the compromise I am currently using is around 10 nF (I see you
are still old school with 0.022 uF, do you still think in terms of ľľF?)
But this is just a value I got by simulating (ala John Larkin). I'd
like to know how to calculate it. I'm pretty convinced the gain of the
circuit has an effect, but I'd have to write out the equations to figure
it out. Obviously it isn't something simple like
C = G / 2pi R f.

BTW, the only way to get 60 kHz on the truly flat portion of the
response curve seems to be to roll off the gain. Even the circuit you
provided has the response down 2 dB at 60 kHz. That's ok with me. I
don't mind if the gain varies a bit from unit to unit. I may not even
use two stages (or one for that matter) in the final circuit. There
will be a huge amount of gain in the digital section. The trick is
getting the signal past the input into the digital section.

--

Rick

 

[Martin Riddle]

On Wed, 19 Nov 2014 14:02:53 -0700, Don Y <this@is.not.me.com> wrote:

Hi,

I'm reviewing stats for some execution times (which imply data transfer
rates) of some utilities I'd run previously on laptops and, from that,
see what I can only attribute to lousy disk subsystem performance.

Granted, laptop drives tend to be less performant simply because
of power and space considerations (and, the Windows disk access
patterns). And, of course, laptops are all over the map in terms
of price/performance.

But, what sort of unbuffered,[1] single sector performance are you
likely to encounter in that environment? E.g., a desktop disk can
easily saturate a 100Mb link -- or a USB2 PCI i/f. I'm not sure
that is true with many (?) laptop drives...

I realize the 2.5" form factor (nor the PATA/SATA distinction)
should arbitrarily limit performance (though low RPMs can). E.g.,
I have some 2.5" drives that will do 300MB/s easily (though run
very warm and draw twice the power of "typical" drives)

Thx,
--don


[1] Of course, all disk accesses are buffered -- in several places.
My point is "without taking explicit and extraordinary measures"...

As pointed out most consumer drives are ~40Mbs.
I have a WD blue 160G PATA, I see ~45Mbs.
I also have a WD Scorpio Black, I see ~100Mbs on a 3yr old acer i5.
My PATA laptop is now using a PATA to MSATA converter and maxes out at
90Mbs with a Msata SSD.

I've come to the conclsion that drives with a good 4k cluster size
transfer rate get high ratings, like the samsung SSD drives. THeir 4k
transfer rates are higher than average, but not by much.

NTFS by default uses 4k Clusters.

Cheers

 

[Robert Baer]

dakupoto@gmail.com wrote:

Could some electronics guru pleas explain what
a "self-ballasted" LED lamp mean ? I have seen
LED lamps, running off the AC line, and powered
by a simple small 5V 1 Amp SMPS, but what exactly
does a self-ballasted LED lamp mean ?
That term is also used for dual transistors; means "resistor(s) added".

 

[rickman]

On 11/21/2014 4:10 AM, josephkk wrote:

On Fri, 21 Nov 2014 10:51:57 +1100, Clifford Heath <no.spam@please.net
wrote:

On 19/11/14 09:02, rickman wrote:
Thanks for helping me understand this.

Now I need to figure out why the Cascode design doesn't deliver a higher
gain. It should, right? Ah, I just found it. He left the output on
the drain to emitter leg and the output is now on the collector! That's
much better giving some 75 dB at 60 kHz now.

Thanks, I think I learned a few things. Now if I can bias the circuit
properly.

I've previously mentioned my 350MHz RF probe/amplifier, which uses a
cascode. If you want to explore it in LTSpice, the full design files and
performance measurements are here:

http://cjh.polyplex.org/electronics/RFCascodeProbe/

The bandwidth is limited by the Ciss of the FET and the probe lead
inductance.

Something I don't understand, which someone more experienced might be
able to explain, is why I had to add such a large source resistance to
the input to kill the resonance between the input inductance and the
Ciss. Input inductance is approximately right for a pair of 4mm probes,
and they won't have appreciable resistance. What kills this resonance in
real life?

Clifford Heath.

I am not sure what difference it will make but i would try capacitors from
the drain to ground to remove any AC gain to the drain which will have
some interesting side effects.

Yes, that sounds right. If you are using a source follower why have a
resistor in the drain leg? The only time I have seen balanced resistors
in the source and drain legs without bypass caps is when generating
differential signals. I would say in this case the drain resistor is
simply inappropriate and is setting up the input for the Miller effect.
Either bypass or remove R11.

--

Rick

 

[josephkk]

On Fri, 21 Nov 2014 10:51:57 +1100, Clifford Heath <no.spam@please.net>
wrote:

On 19/11/14 09:02, rickman wrote:
Thanks for helping me understand this.

Now I need to figure out why the Cascode design doesn't deliver a higher
gain. It should, right? Ah, I just found it. He left the output on
the drain to emitter leg and the output is now on the collector! That's
much better giving some 75 dB at 60 kHz now.

Thanks, I think I learned a few things. Now if I can bias the circuit
properly.

I've previously mentioned my 350MHz RF probe/amplifier, which uses a
cascode. If you want to explore it in LTSpice, the full design files and
performance measurements are here:

http://cjh.polyplex.org/electronics/RFCascodeProbe/

The bandwidth is limited by the Ciss of the FET and the probe lead
inductance.

Something I don't understand, which someone more experienced might be
able to explain, is why I had to add such a large source resistance to
the input to kill the resonance between the input inductance and the
Ciss. Input inductance is approximately right for a pair of 4mm probes,
and they won't have appreciable resistance. What kills this resonance in
real life?

Clifford Heath.

I am not sure what difference it will make but i would try capacitors from
the drain to ground to remove any AC gain to the drain which will have
some interesting side effects.

??-)

 

[Jasen Betts]

On 2014-11-21, rickman <gnuarm@gmail.com> wrote:

On 11/20/2014 4:29 PM, legg wrote:
On Thu, 20 Nov 2014 11:36:06 -0500, rickman <gnuarm@gmail.com> wrote:

On 11/20/2014 11:28 AM, Tim Williams wrote:
"legg" <legg@nospam.magma.ca> wrote in message
news:26qr6a9nfcf0dehq7rotu3tpc4an1jq24g@4ax.com...
Similar complexity is present in semiconductor large scale integration
or optical interfaces. It's there, but you just don't notice it except
perhaps as a more frequent junking of some device that used to last
for decades.

Some applications simply defy miniaturization. Some will never last
long enough to justify the effort. The first attempt is often the
end-run, trying to avoid the need for so many individual terminations.

Compactrons come to mind.

I've got to imagine tubes could be pretty slick these days with MEMS.

If they had MEMS back in the day, they could've done some really neat
stuff, integrated TV receiver - demodulator - chroma separator, say.

Of course... "neat stuff" would include transistors, so we'd still be
where we are today without the glowbugs. :^)

I seem to recall there was a UK company with a plan to produce a pre-LCD
display using very pointy field emitters. I can't recall if they were
etched in Si, or what. Is that the sort of thing you are referring to
with MEMS tubes?

I believe this company never shipped a commercial product.

You're possibly thinking of field emission triodes and arrays. I
believe the issue was with erosion of the emitter (even with vapor
deposited diamond surfaces). They were etched in Si, GaAs and InP.
Not much published after Y2K.

Field emission was also a consideration for Ion Propulsion thrusters.

Wikipedia to the rescue.

http://en.wikipedia.org/wiki/Field_emission_display

They describe it as being printed but to mention the need for a higher
vacuum than is used in a CRT. As to who was doing the development, I
may well be confusing Sir Clive Sinclare's flat CRT with this display.
The wiki article does not say anyone ever produced a commercial product
using this technology.

The Sinclair pocket TV was an ordinary CRT with the phosphor viweed
from behind and the gun below.

There was also an LCD model with passive backlighting, not sure whose
name was on that one (Casio?).

--
umop apisdn

 

[Jasen Betts]

On 2014-11-20, smbaker@gmail.com <smbaker@gmail.com> wrote:

You could also get a 6V 3A wart cheap.

Life is never so simple... I bench checked the power supplies, and
they're actually all 5.45V (same reading loaded and unloaded), not 6V
as stated on the label. There's also a "5V 3A" labeled power supply
from the same company that measures out at 5.45V.

plus or minus ten percent eh!

> These are for LED Christmas lights,

probably close enough then.

--
umop apisdn

 

[Clifford Heath]

On 21/11/14 19:15, rickman wrote:

On 11/21/2014 4:10 AM, josephkk wrote:
On Fri, 21 Nov 2014 10:51:57 +1100, Clifford Heath <no.spam@please.net
wrote:

On 19/11/14 09:02, rickman wrote:
Thanks for helping me understand this.

Now I need to figure out why the Cascode design doesn't deliver a
higher
gain. It should, right? Ah, I just found it. He left the output on
the drain to emitter leg and the output is now on the collector!
That's
much better giving some 75 dB at 60 kHz now.

Thanks, I think I learned a few things. Now if I can bias the circuit
properly.

I've previously mentioned my 350MHz RF probe/amplifier, which uses a
cascode. If you want to explore it in LTSpice, the full design files and
performance measurements are here:

http://cjh.polyplex.org/electronics/RFCascodeProbe/

The bandwidth is limited by the Ciss of the FET and the probe lead
inductance.

Something I don't understand, which someone more experienced might be
able to explain, is why I had to add such a large source resistance to
the input to kill the resonance between the input inductance and the
Ciss. Input inductance is approximately right for a pair of 4mm probes,
and they won't have appreciable resistance. What kills this resonance in
real life?

Clifford Heath.

I am not sure what difference it will make but i would try capacitors
from
the drain to ground to remove any AC gain to the drain which will have
some interesting side effects.

Yes, that sounds right. If you are using a source follower why have a
resistor in the drain leg? The only time I have seen balanced resistors
in the source and drain legs without bypass caps is when generating
differential signals. I would say in this case the drain resistor is
simply inappropriate and is setting up the input for the Miller effect.
Either bypass or remove R11.

R11 was only there in the schematic file - you'll see it's a piece of
wire in the photos. It's not in the LTSpice file. So the drain is
directly bypassed to ground.

10pF Ciss and 20nH (for 20mm total) is about right for the measured
350MHz. That much is explained. But if you look at the LTSpice and
remove the extra capacitance C6, you get a massive resonant peak which
isn't there in the physical measurements. I played with source
resistance as a mechanism, but I still can't get the Spice to act like
the measured curves.

 

[rickman]

On 11/20/2014 9:46 PM, legg wrote:

On Thu, 20 Nov 2014 19:16:49 -0500, rickman <gnuarm@gmail.com> wrote:

On 11/20/2014 4:29 PM, legg wrote:
On Thu, 20 Nov 2014 11:36:06 -0500, rickman <gnuarm@gmail.com> wrote:

On 11/20/2014 11:28 AM, Tim Williams wrote:
"legg" <legg@nospam.magma.ca> wrote in message
news:26qr6a9nfcf0dehq7rotu3tpc4an1jq24g@4ax.com...
Similar complexity is present in semiconductor large scale integration
or optical interfaces. It's there, but you just don't notice it except
perhaps as a more frequent junking of some device that used to last
for decades.

Some applications simply defy miniaturization. Some will never last
long enough to justify the effort. The first attempt is often the
end-run, trying to avoid the need for so many individual terminations.

Compactrons come to mind.

I've got to imagine tubes could be pretty slick these days with MEMS.

If they had MEMS back in the day, they could've done some really neat
stuff, integrated TV receiver - demodulator - chroma separator, say.

Of course... "neat stuff" would include transistors, so we'd still be
where we are today without the glowbugs. :^)

I seem to recall there was a UK company with a plan to produce a pre-LCD
display using very pointy field emitters. I can't recall if they were
etched in Si, or what. Is that the sort of thing you are referring to
with MEMS tubes?

I believe this company never shipped a commercial product.

You're possibly thinking of field emission triodes and arrays. I
believe the issue was with erosion of the emitter (even with vapor
deposited diamond surfaces). They were etched in Si, GaAs and InP.
Not much published after Y2K.

Field emission was also a consideration for Ion Propulsion thrusters.

Wikipedia to the rescue.

http://en.wikipedia.org/wiki/Field_emission_display

They describe it as being printed but to mention the need for a higher
vacuum than is used in a CRT. As to who was doing the development, I
may well be confusing Sir Clive Sinclare's flat CRT with this display.
The wiki article does not say anyone ever produced a commercial product
using this technology.

Motorola relesed a 5inch part for an RGB development platform in '98.
(Pixtek?) and Futaba released a monochrome version about the same
time.
20,000hr life might be OK as an FRU in aircraft, but I don't
know.....

Heck, that is 8 hours a day for 7 years or almost 10 years if you just
count weekdays. Most computer equipment is obsolete before then. This
is one of those cases where the only good screen saver is to power it
down, lol.

--

Rick

 

[rickman]

On 11/21/2014 5:42 AM, Jasen Betts wrote:

On 2014-11-21, rickman <gnuarm@gmail.com> wrote:
On 11/20/2014 4:29 PM, legg wrote:
On Thu, 20 Nov 2014 11:36:06 -0500, rickman <gnuarm@gmail.com> wrote:

On 11/20/2014 11:28 AM, Tim Williams wrote:
"legg" <legg@nospam.magma.ca> wrote in message
news:26qr6a9nfcf0dehq7rotu3tpc4an1jq24g@4ax.com...
Similar complexity is present in semiconductor large scale integration
or optical interfaces. It's there, but you just don't notice it except
perhaps as a more frequent junking of some device that used to last
for decades.

Some applications simply defy miniaturization. Some will never last
long enough to justify the effort. The first attempt is often the
end-run, trying to avoid the need for so many individual terminations.

Compactrons come to mind.

I've got to imagine tubes could be pretty slick these days with MEMS.

If they had MEMS back in the day, they could've done some really neat
stuff, integrated TV receiver - demodulator - chroma separator, say.

Of course... "neat stuff" would include transistors, so we'd still be
where we are today without the glowbugs. :^)

I seem to recall there was a UK company with a plan to produce a pre-LCD
display using very pointy field emitters. I can't recall if they were
etched in Si, or what. Is that the sort of thing you are referring to
with MEMS tubes?

I believe this company never shipped a commercial product.

You're possibly thinking of field emission triodes and arrays. I
believe the issue was with erosion of the emitter (even with vapor
deposited diamond surfaces). They were etched in Si, GaAs and InP.
Not much published after Y2K.

Field emission was also a consideration for Ion Propulsion thrusters.

Wikipedia to the rescue.

http://en.wikipedia.org/wiki/Field_emission_display

They describe it as being printed but to mention the need for a higher
vacuum than is used in a CRT. As to who was doing the development, I
may well be confusing Sir Clive Sinclare's flat CRT with this display.
The wiki article does not say anyone ever produced a commercial product
using this technology.


The Sinclair pocket TV was an ordinary CRT with the phosphor viweed
from behind and the gun below.

You say "ordinary" CRT, but that is what it was all about, a very unique
CRT!

There was also an LCD model with passive backlighting, not sure whose
name was on that one (Casio?).

I remember seeing one of those. But they were pricey and tiny. Even in
my early years I was not a fan of squinting at a tiny screen which is
what I literally have to do with my cell phone now.

--

Rick

 

[rickman]

On 11/21/2014 6:21 AM, Clifford Heath wrote:

On 21/11/14 19:15, rickman wrote:
On 11/21/2014 4:10 AM, josephkk wrote:
On Fri, 21 Nov 2014 10:51:57 +1100, Clifford Heath <no.spam@please.net
wrote:

On 19/11/14 09:02, rickman wrote:
Thanks for helping me understand this.

Now I need to figure out why the Cascode design doesn't deliver a
higher
gain. It should, right? Ah, I just found it. He left the output on
the drain to emitter leg and the output is now on the collector!
That's
much better giving some 75 dB at 60 kHz now.

Thanks, I think I learned a few things. Now if I can bias the circuit
properly.

I've previously mentioned my 350MHz RF probe/amplifier, which uses a
cascode. If you want to explore it in LTSpice, the full design files
and
performance measurements are here:

http://cjh.polyplex.org/electronics/RFCascodeProbe/

The bandwidth is limited by the Ciss of the FET and the probe lead
inductance.

Something I don't understand, which someone more experienced might be
able to explain, is why I had to add such a large source resistance to
the input to kill the resonance between the input inductance and the
Ciss. Input inductance is approximately right for a pair of 4mm probes,
and they won't have appreciable resistance. What kills this
resonance in
real life?

Clifford Heath.

I am not sure what difference it will make but i would try capacitors
from
the drain to ground to remove any AC gain to the drain which will have
some interesting side effects.

Yes, that sounds right. If you are using a source follower why have a
resistor in the drain leg? The only time I have seen balanced resistors
in the source and drain legs without bypass caps is when generating
differential signals. I would say in this case the drain resistor is
simply inappropriate and is setting up the input for the Miller effect.
Either bypass or remove R11.

R11 was only there in the schematic file - you'll see it's a piece of
wire in the photos. It's not in the LTSpice file. So the drain is
directly bypassed to ground.

10pF Ciss and 20nH (for 20mm total) is about right for the measured
350MHz. That much is explained. But if you look at the LTSpice and
remove the extra capacitance C6, you get a massive resonant peak which
isn't there in the physical measurements. I played with source
resistance as a mechanism, but I still can't get the Spice to act like
the measured curves.

I don't know that much about the models or the actual circuits really.
Maybe Joerg could give an opinion or some of the others here who know
about such things?

--

Rick

 

[Joerg]

rickman wrote:

On 11/20/2014 10:49 AM, Joerg wrote:
rickman wrote:

The corner frequency I thought I was calculating would be the point
where the impedance of the bypass cap becomes large enough to impact the
gain of the FET with is more about the drain resistor than the source
resistor.


Corner frequency really does not matter here. Just calculate it so the
60kHz is in the flat part. 0.022uF is a good start, assuming you don't
intend to listen to anything below 20kHz. VLF reception would be another
story.

If you want more repeatable and flat gain you'd have to place resistors
in series with C1 and C3. Of course that will lower overall gain.

Wait a minute. Either I calculate the corner frequency or I don't... lol

RF guys do that back-of-the-envelope, at the most. Because component
tolerances are too high to count on such corner values. Nowadays it's
done on the sim.

I think the compromise I am currently using is around 10 nF (I see you
are still old school with 0.022 uF, do you still think in terms of ľľF?)

No, in jars

I do a lot of aerospace design where everything is in imperial units and
it is more customary to us uF and pF. Anyhow, 10nF is a bit dicey here.

But this is just a value I got by simulating (ala John Larkin).

<raises hand>

Full confession: Most of us do that these days.

... I'd
like to know how to calculate it. I'm pretty convinced the gain of the
circuit has an effect, but I'd have to write out the equations to figure
it out. Obviously it isn't something simple like
C = G / 2pi R f.

As I mentioned, in this case not so much. The AC gain of a single
transistor stage is normally determined by the ratio of drain path
impedance versus source path impedance (collector/emitter with a BJT).
This includes all loads and whatnot, including capacitive ones and
everything else.

In you case you do not have any degeneration resistor in the AC path at
the source. For a hobby project you can get away with that. The gain is
still calculated the same way as above except you only have the
capacitive impedance in the source. However, your transistor reaches the
limits, it has internal impedances and other effects that limit the
gain. IOW, your amp is already running pedal to the metal, any further
increase in capacitance will not noticeably improve the gain at 60kHz.
It just pushes the lower gain roll-off down in the spectrum which isn't
desirable for noise reasons.

BTW, the only way to get 60 kHz on the truly flat portion of the
response curve seems to be to roll off the gain. Even the circuit you
provided has the response down 2 dB at 60 kHz. ...

That's because the FETs are maxed out in terms of gain, you can squeeze
out a few dB more but that's it. Feedback (degeneration) is the only way
to truly set a reproducible gain and it will also provide a nice flat
response over a larger frequency range.

... That's ok with me. I
don't mind if the gain varies a bit from unit to unit. I may not even
use two stages (or one for that matter) in the final circuit. There
will be a huge amount of gain in the digital section. The trick is
getting the signal past the input into the digital section.

Hopefully it works that way. I've seen such methods of digitizing fall
apart in noisy environments. If you live in a more rural or spacious
suburban setting it might work. But only if you don't have to many dirty
electronic devices in your house, like bargain LED lights and such.

It can work. In the early days of medical ultrasound we built Doppler
units that way. The signal ended up in a comparator and then the micro
controller, we did what was called "zero-crossing detection". However,
it could not hold a candle to the more expensive systems with analog
pre-processing. For quickly finding out if there is sufficient blood
flow in a femoral artery it was good enough.

--
Regards, Joerg

http://www.analogconsultants.com/

 

[Joerg]

rickman wrote:

On 11/21/2014 6:21 AM, Clifford Heath wrote:
On 21/11/14 19:15, rickman wrote:
On 11/21/2014 4:10 AM, josephkk wrote:
On Fri, 21 Nov 2014 10:51:57 +1100, Clifford Heath <no.spam@please.net
wrote:

On 19/11/14 09:02, rickman wrote:
Thanks for helping me understand this.

Now I need to figure out why the Cascode design doesn't deliver a
higher
gain. It should, right? Ah, I just found it. He left the output on
the drain to emitter leg and the output is now on the collector!
That's
much better giving some 75 dB at 60 kHz now.

Thanks, I think I learned a few things. Now if I can bias the
circuit
properly.

I've previously mentioned my 350MHz RF probe/amplifier, which uses a
cascode. If you want to explore it in LTSpice, the full design files
and
performance measurements are here:

http://cjh.polyplex.org/electronics/RFCascodeProbe/

The bandwidth is limited by the Ciss of the FET and the probe lead
inductance.

Something I don't understand, which someone more experienced might be
able to explain, is why I had to add such a large source resistance to
the input to kill the resonance between the input inductance and the
Ciss. Input inductance is approximately right for a pair of 4mm
probes,
and they won't have appreciable resistance. What kills this
resonance in
real life?

Clifford Heath.

I am not sure what difference it will make but i would try capacitors
from
the drain to ground to remove any AC gain to the drain which will have
some interesting side effects.

Yes, that sounds right. If you are using a source follower why have a
resistor in the drain leg? The only time I have seen balanced resistors
in the source and drain legs without bypass caps is when generating
differential signals. I would say in this case the drain resistor is
simply inappropriate and is setting up the input for the Miller effect.
Either bypass or remove R11.

R11 was only there in the schematic file - you'll see it's a piece of
wire in the photos. It's not in the LTSpice file. So the drain is
directly bypassed to ground.

10pF Ciss and 20nH (for 20mm total) is about right for the measured
350MHz. That much is explained. But if you look at the LTSpice and
remove the extra capacitance C6, you get a massive resonant peak which
isn't there in the physical measurements. I played with source
resistance as a mechanism, but I still can't get the Spice to act like
the measured curves.

I don't know that much about the models or the actual circuits really.
Maybe Joerg could give an opinion or some of the others here who know
about such things?

Source or emitter followers can be like a sports cars on a sheet of ice,
even oscillate. Hard to see the layout but a few hints. Please don't
take that as an attempt to pick on the design, just suggestions:

1. R10 sould be via'd straight to GND at its pad and not looped all the
way to the input GND terminal.

2. R11: Just jumpering it does not really take it out in the RF world.
The drain would have to be via'd straight to 9V nd that 9V should be a
plane.

3. C7 does a "loop-de-loop" and that adds unwanted inductance.

4. Parts on RF probes should be 0402 or 0603 at the most. Otherwise
there is too much inductance. For bypass caps consider side-contact ones.

5. Grund plane: It is almost broken in the neck area. Needs to be flooded.

6. Use a 4-layer board. 2-layer is very tough because you can't have a
supply plane.

--
Regards, Joerg

http://www.analogconsultants.com/

 

On Fri, 21 Nov 2014 06:30:32 -0500, rickman <gnuarm@gmail.com> wrote:

The Sinclair pocket TV was an ordinary CRT with the phosphor viweed
from behind and the gun below.

You say "ordinary" CRT, but that is what it was all about, a very unique
CRT!

The early (1930's) camera tubes had that kind of layout.

 

[rickman]

On 11/21/2014 1:11 PM, upsidedown@downunder.com wrote:

On Fri, 21 Nov 2014 06:30:32 -0500, rickman <gnuarm@gmail.com> wrote:

The Sinclair pocket TV was an ordinary CRT with the phosphor viweed
from behind and the gun below.

You say "ordinary" CRT, but that is what it was all about, a very unique
CRT!

The early (1930's) camera tubes had that kind of layout.

I can't find anything to support that idea unless this is what you mean.

http://en.wikipedia.org/wiki/Video_camera_tube#mediaviewer/File:Zworykin_and_iconoscope.jpg

That is not really the same thing as the tube is not flat and the beam
is not "bent" from its straight path onto the surface, it is just
scanned in the raster pattern.

--

Rick

 

[DecadentLinuxUserNumeroUn]

On Fri, 21 Nov 2014 15:13:00 -0500, rickman <gnuarm@gmail.com> Gave us:

On 11/21/2014 1:11 PM, upsidedown@downunder.com wrote:
On Fri, 21 Nov 2014 06:30:32 -0500, rickman <gnuarm@gmail.com> wrote:

The Sinclair pocket TV was an ordinary CRT with the phosphor viweed
from behind and the gun below.

You say "ordinary" CRT, but that is what it was all about, a very unique
CRT!

The early (1930's) camera tubes had that kind of layout.

I can't find anything to support that idea unless this is what you mean.

http://en.wikipedia.org/wiki/Video_camera_tube#mediaviewer/File:Zworykin_and_iconoscope.jpg

That is not really the same thing as the tube is not flat and the beam
is not "bent" from its straight path onto the surface, it is just
scanned in the raster pattern.

You refer to display technology. THEY have curved tubes.

A camera tube of that era IS a flat image surface onto which the camera
optics casts the photonic information they gather.

The rear part of the tube was that same diameter as the face. Looks
like a big, already clean-cut prepped cigar.

The "vidicon" which appears UNDER that photo, when you kill it IS the
type I refer to.

Vidicons were used in TV studio cameras well into the '70s. Remember
the lag and burn on the early football game airings? I do.

 

[Clifford Heath]

On 22/11/14 03:04, Joerg wrote:

rickman wrote:
On 11/21/2014 6:21 AM, Clifford Heath wrote:
On 21/11/14 19:15, rickman wrote:
On 11/21/2014 4:10 AM, josephkk wrote:
On Fri, 21 Nov 2014 10:51:57 +1100, Clifford Heath <no.spam@please.net
wrote:

On 19/11/14 09:02, rickman wrote:
Thanks for helping me understand this.

Now I need to figure out why the Cascode design doesn't deliver a
higher
gain. It should, right? Ah, I just found it. He left the output on
the drain to emitter leg and the output is now on the collector!
That's
much better giving some 75 dB at 60 kHz now.

Thanks, I think I learned a few things. Now if I can bias the
circuit
properly.

I've previously mentioned my 350MHz RF probe/amplifier, which uses a
cascode. If you want to explore it in LTSpice, the full design files
and
performance measurements are here:

http://cjh.polyplex.org/electronics/RFCascodeProbe/

The bandwidth is limited by the Ciss of the FET and the probe lead
inductance.

Something I don't understand, which someone more experienced might be
able to explain, is why I had to add such a large source resistance to
the input to kill the resonance between the input inductance and the
Ciss. Input inductance is approximately right for a pair of 4mm
probes,
and they won't have appreciable resistance. What kills this
resonance in
real life?

Clifford Heath.

I am not sure what difference it will make but i would try capacitors
from
the drain to ground to remove any AC gain to the drain which will have
some interesting side effects.

Yes, that sounds right. If you are using a source follower why have a
resistor in the drain leg? The only time I have seen balanced resistors
in the source and drain legs without bypass caps is when generating
differential signals. I would say in this case the drain resistor is
simply inappropriate and is setting up the input for the Miller effect.
Either bypass or remove R11.

R11 was only there in the schematic file - you'll see it's a piece of
wire in the photos. It's not in the LTSpice file. So the drain is
directly bypassed to ground.

10pF Ciss and 20nH (for 20mm total) is about right for the measured
350MHz. That much is explained. But if you look at the LTSpice and
remove the extra capacitance C6, you get a massive resonant peak which
isn't there in the physical measurements. I played with source
resistance as a mechanism, but I still can't get the Spice to act like
the measured curves.

I don't know that much about the models or the actual circuits really.
Maybe Joerg could give an opinion or some of the others here who know
about such things?


Source or emitter followers can be like a sports cars on a sheet of ice,
even oscillate. Hard to see the layout but a few hints. Please don't
take that as an attempt to pick on the design, just suggestions:

1. R10 sould be via'd straight to GND at its pad and not looped all the
way to the input GND terminal.

2. R11: Just jumpering it does not really take it out in the RF world.
The drain would have to be via'd straight to 9V nd that 9V should be a
plane.

3. C7 does a "loop-de-loop" and that adds unwanted inductance.

4. Parts on RF probes should be 0402 or 0603 at the most. Otherwise
there is too much inductance. For bypass caps consider side-contact ones.

5. Grund plane: It is almost broken in the neck area. Needs to be flooded.

6. Use a 4-layer board. 2-layer is very tough because you can't have a
supply plane.

Sincere thanks for your gems, Joerg. This is my first design above HF,
which you can probably see!

I'm not unhappy with the measured performance (it's quite well-behaved
up to and around 350MHz) even though it could easily be improved as you
point out. The behaviour that still puzzles me is what LTSpice predicts
however.

Why does Spice predict such a hump (without C6), and what needs to be
added to the simulation to make it match reality? Maybe JimT has some
thoughts, or one of the other LTSpice gurus?

Clifford Heath.

 

[miso]

Robert Baer wrote:

Like the GC Electronics 19-1902 fer eggzampull?
Need only one bottle, not a case.
If i remember correctly, this DE-OX-ID was reddish in color and was
the super-daddy to their 10-630 JIF-ACTION (slightly yellow).
One bottle will last "forever".

I use Caig Deoxit. Not cheap, but whatever.