Dirty sine wave generator

[Martin Brown]

On 22/09/2019 16:42, bitrex wrote:

On 9/22/19 4:58 AM, Martin Brown wrote:

Why screw with the integrator and the diode mess when you can use a
single chip and a few resistors to get a pretty good approximation to
a sine wave.  A simple filter will get rid of the harmonics.  The
more steps you use, the more attenuation you get with the same
filter.  A 14 pin, 8 FF shift register (74xx164) and anything that
inverts plus 8 resistors and a single capacitor gets you a pretty
simple and effective circuit.

Fewer chips than the integrator/diode thing.  Simpler.  Easy to see
if you have something wrong.

I am inclined to agree. I thought he was pushing hard up against the
actual speed capabilities of the parts not down at a few hundred kHz.

300kHz FS square wave out of an op amp with a barely 7 V/uS slew rate
(because it's a micro-power part) - sucks!

Another option might be to use a comparator to turn the analogue signal
into digital and then correlate against the references with digital XOR.
ISTR one 1980s's portable low frequency LBI system used one bit
digitisation this way. If you do it well you can get about 60% (2/pi) of
the available correlated signal detected on a good day.

--
Regards,
Martin Brown

 

On Sunday, 22 September 2019 16:42:06 UTC+1, bitrex wrote:

On 9/22/19 4:58 AM, Martin Brown wrote:

Why screw with the integrator and the diode mess when you can use a
single chip and a few resistors to get a pretty good approximation to
a sine wave.  A simple filter will get rid of the harmonics.  The
more steps you use, the more attenuation you get with the same
filter.  A 14 pin, 8 FF shift register (74xx164) and anything that
inverts plus 8 resistors and a single capacitor gets you a pretty
simple and effective circuit.

Fewer chips than the integrator/diode thing.  Simpler.  Easy to see
if you have something wrong.

I am inclined to agree. I thought he was pushing hard up against the
actual speed capabilities of the parts not down at a few hundred kHz.

300kHz FS square wave out of an op amp with a barely 7 V/uS slew rate
(because it's a micro-power part) - sucks!

low slew rate can help it become more sine-like, at least if it doesn't overshoot wildly.


NT

 

On Sunday, 22 September 2019 17:21:30 UTC+1, Martin Brown wrote:

Another option might be to use a comparator to turn the analogue signal
into digital and then correlate against the references with digital XOR.
ISTR one 1980s's portable low frequency LBI system used one bit
digitisation this way. If you do it well you can get about 60% (2/pi) of
the available correlated signal detected on a good day.

Some GPS receivers use a comparator to digitise the incoming signal.

John

 

[Rick C]

On Sunday, September 22, 2019 at 4:58:25 AM UTC-4, Martin Brown wrote:

On 21/09/2019 04:29, Rick C wrote:
On Friday, September 20, 2019 at 5:47:54 AM UTC-4, Martin Brown
wrote:
On 19/09/2019 16:02, bitrex wrote:
On 9/19/19 4:52 AM, Martin Brown wrote:
On 19/09/2019 06:35, bitrex wrote:
Is there a way to extrapolate this D flip flop-based/XOR
modified sine-wave generator to be a little less "steppy"
using a couple more flops or XOR gates? or provide outputs of
different phases?

I was thinking about a thing using the TinyLogic series
flops/gates to clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif



The faster you try to clock it the worse things will get with
propagation delays in the flip flops as drawn.

To take out most of the 5th harmonic component you will need a
divide by 5 counter in the right phase. Each extra component
you try to compensate seriously limits the maximum output
frequency that it will work at. The fundamental will be lowered
from f/3 to f/15 by adding this factor.

The least bad fix might be to treat the output as a current
source and integrate it so that you get a step wise linear
approximation. (or aggressively low pass filter against the
fifth harmonic and above).

What are you trying to do?


I have an I/Q demodulator/detector scheme that has to run pretty
fast at very low voltage, the 0 degree phase path goes through
some op amps with somewhat limited bandwidth and slew rate
because they're low voltage types. it's fed by a reference
clock.

the whole system would work fine with square waves if I had the
budget for infinite GBW and slew rate parts but the op amps I can
afford on the budget in the path don't really have enough GBW and
slew rate to support a square wave at the speed I need to go so,
I don't want to shove a raw square into them like a brutal
person.

this would work fine to produce a modified sine and a quadrature
square wave and is just what I need, aside from the glitches
which causes problems down the line. using lower value resistors
I can just drive the input of the analog section directly from
the flop outputs, the amps are single-supply biased at the
mid-point of the same supply and just drive it in, nice.

https://imgur.com/a/IahCKuJ

I want to maintain a tight phase relationship between the two
signals so IDK if aggressive low passing is an option here. a
couple flops and gates is within my price/power budget so I'm
wishing there was a way to eliminate the glitch at the source
without piling on parts, at that point I'd likely just resort to
DDS. but I'd prefer to be able to provide a solution that works
OK driven by a clock from whatever source in this case

How about a 2 flip flop Johnson ring counter then? That can be
configured to generate the quadrature square waves.

Integrate them to a triangle wave and use diode shaping. How wide a
range of frequencies does this have to work at?

Why screw with the integrator and the diode mess when you can use a
single chip and a few resistors to get a pretty good approximation to
a sine wave. A simple filter will get rid of the harmonics. The
more steps you use, the more attenuation you get with the same
filter. A 14 pin, 8 FF shift register (74xx164) and anything that
inverts plus 8 resistors and a single capacitor gets you a pretty
simple and effective circuit.

Fewer chips than the integrator/diode thing. Simpler. Easy to see
if you have something wrong.

I am inclined to agree. I thought he was pushing hard up against the
actual speed capabilities of the parts not down at a few hundred kHz.

BTW, the 2 FF ring counter doesn't even give you as good an
approximation as the other circuit since the timing is equal and the
steps have to be equal. The original circuit has unequal timing on
the two amplitude bits and unequal amplitude to give a better
approximation. The OP's simulation is not correct. It appears his
weighting resistors are approximately equal so the amplitudes are the
same and it ends up looking like a triangle more than a sine.

A two step approximation to a sine wave is always going to look pretty
dreadful - that is why is suggested piecewise linear approximation which
would otherwise work fairly well for a spot frequency - even more so
with a bit of diode shaping to lop the top off.

The important thing that the 2 FF ring does provide is a locked phase
quadrature output which was one of his other unsatisfied requirements.

Don't know what your point is. The Johnson ring counter gives you a number of phases with adjustable edges both leading and trailing. You can have half of the 50/50 duty cycle waveforms with no gates, the other half with a simple inverter. Quadrature square wave are no gate signals. Best of all, all these signals, 50/50 duty cycle or not, are glitch free! You would need to be pretty ignorant of the circuit to want to use anything else or have some very odd and special needs. Both circuits use a 14 pin 7400 type device and an extra gate, XOR in one case and an inverter in the other (which can be an XOR with a pin pulled high). The Johnson ring counter has more bits of resolution, so it requires more resistors. That's the only difference.

--

Rick C.

+-- Get 2,000 miles of free Supercharging
+-- Tesla referral code - https://ts.la/richard11209

 

[Rick C]

On Sunday, September 22, 2019 at 11:37:29 AM UTC-4, bitrex wrote:

On 9/22/19 4:58 AM, Martin Brown wrote:
On 21/09/2019 04:29, Rick C wrote:
On Friday, September 20, 2019 at 5:47:54 AM UTC-4, Martin Brown
wrote:
On 19/09/2019 16:02, bitrex wrote:
On 9/19/19 4:52 AM, Martin Brown wrote:
On 19/09/2019 06:35, bitrex wrote:
Is there a way to extrapolate this D flip flop-based/XOR
modified sine-wave generator to be a little less "steppy"
using a couple more flops or XOR gates? or provide outputs of
different phases?

I was thinking about a thing using the TinyLogic series
flops/gates to clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif



The faster you try to clock it the worse things will get with
propagation delays in the flip flops as drawn.

To take out most of the 5th harmonic component you will need a
divide by 5 counter in the right phase. Each extra component
you try to compensate seriously limits the maximum output
frequency that it will work at. The fundamental will be lowered
from f/3 to f/15 by adding this factor.

The least bad fix might be to treat the output as a current
source and integrate it so that you get a step wise linear
approximation. (or aggressively low pass filter against the
fifth harmonic and above).

What are you trying to do?


I have an I/Q demodulator/detector scheme that has to run pretty
fast at very low voltage, the 0 degree phase path goes through
some op amps with somewhat limited bandwidth and slew rate
because they're low voltage types. it's fed by a reference
clock.

the whole system would work fine with square waves if I had the
budget for infinite GBW and slew rate parts but the op amps I can
afford on the budget in the path don't really have enough GBW and
slew rate to support a square wave at the speed I need to go so,
I don't want to shove a raw square into them like a brutal
person.

this would work fine to produce a modified sine and a quadrature
square wave and is just what I need, aside from the glitches
which causes problems down the line. using lower value resistors
I can just drive the input of the analog section directly from
the flop outputs, the amps are single-supply biased at the
mid-point of the same supply and just drive it in, nice.

https://imgur.com/a/IahCKuJ

I want to maintain a tight phase relationship between the two
signals so IDK if aggressive low passing is an option here. a
couple flops and gates is within my price/power budget so I'm
wishing there was a way to eliminate the glitch at the source
without piling on parts, at that point I'd likely just resort to
DDS. but I'd prefer to be able to provide a solution that works
OK driven by a clock from whatever source in this case

How about a 2 flip flop Johnson ring counter then? That can be
configured to generate the quadrature square waves.

Integrate them to a triangle wave and use diode shaping. How wide a
range of frequencies does this have to work at?

Why screw with the integrator and the diode mess when you can use a
single chip and a few resistors to get a pretty good approximation to
a sine wave.  A simple filter will get rid of the harmonics.  The
more steps you use, the more attenuation you get with the same
filter.  A 14 pin, 8 FF shift register (74xx164) and anything that
inverts plus 8 resistors and a single capacitor gets you a pretty
simple and effective circuit.

Fewer chips than the integrator/diode thing.  Simpler.  Easy to see
if you have something wrong.

I am inclined to agree. I thought he was pushing hard up against the
actual speed capabilities of the parts not down at a few hundred kHz.

BTW, the 2 FF ring counter doesn't even give you as good an
approximation as the other circuit since the timing is equal and the
steps have to be equal.  The original circuit has unequal timing on
the two amplitude bits and unequal amplitude to give a better
approximation.  The OP's simulation is not correct.  It appears his
weighting resistors are approximately equal so the amplitudes are the
same and it ends up looking like a triangle more than a sine.

A two step approximation to a sine wave is always going to look pretty
dreadful - that is why is suggested piecewise linear approximation which
would otherwise work fairly well for a spot frequency - even more so
with a bit of diode shaping to lop the top off.

The important thing that the 2 FF ring does provide is a locked phase
quadrature output which was one of his other unsatisfied requirements.


This 4 flip-flopper with the outputs taken from Q and "delayed" not Q
for two phases the should be good enuff

https://imgur.com/a/SZ6Px9N

I suppose "good enuff" is an engineering criteria. But I don't know why you are tossing away the extra output on each phase? You can use four outputs to drive your analog signals and get something much better for the cost of a resistor. What you are doing is simply horrible and an offense to man and nature! Why???

--

Rick C.

+-+ Get 2,000 miles of free Supercharging
+-+ Tesla referral code - https://ts.la/richard11209

 

[bitrex]

On 9/23/19 10:34 AM, Rick C wrote:

A two step approximation to a sine wave is always going to look pretty
dreadful - that is why is suggested piecewise linear approximation which
would otherwise work fairly well for a spot frequency - even more so
with a bit of diode shaping to lop the top off.

The important thing that the 2 FF ring does provide is a locked phase
quadrature output which was one of his other unsatisfied requirements.


This 4 flip-flopper with the outputs taken from Q and "delayed" not Q
for two phases the should be good enuff

https://imgur.com/a/SZ6Px9N

I suppose "good enuff" is an engineering criteria. But I don't know why you are tossing away the extra output on each phase? You can use four outputs to drive your analog signals and get something much better for the cost of a resistor. What you are doing is simply horrible and an offense to man and nature! Why???

I was just following e.g. fig 5 in:

<https://www.tinaja.com/glib/rad_elec/digital_sinewaves_11_76.pdf>

It's not obvious to me how to get a quadrature output from your version
in either four or 8 flop configuration, simply using a set of shifted
resistor values on the not-Q outputs didn't seem to work. But maybe I
did something wrong.

 

[Tauno Voipio]

On 23.9.19 19:16, bitrex wrote:

On 9/23/19 10:34 AM, Rick C wrote:

A two step approximation to a sine wave is always going to look pretty
dreadful - that is why is suggested piecewise linear approximation
which
would otherwise work fairly well for a spot frequency - even more so
with a bit of diode shaping to lop the top off.

The important thing that the 2 FF ring does provide is a locked phase
quadrature output which was one of his other unsatisfied requirements.


This 4 flip-flopper with the outputs taken from Q and "delayed" not Q
for two phases the should be good enuff

https://imgur.com/a/SZ6Px9N

I suppose "good enuff" is an engineering criteria.  But I don't know
why you are tossing away the extra output on each phase?  You can use
four outputs to drive your analog signals and get something much
better for the cost of a resistor.  What you are doing is simply
horrible and an offense to man and nature!  Why???


I was just following e.g. fig 5 in:

https://www.tinaja.com/glib/rad_elec/digital_sinewaves_11_76.pdf

It's not obvious to me how to get a quadrature output from your version
in either four or 8 flop configuration, simply using a set of shifted
resistor values on the not-Q outputs didn't seem to work. But maybe I
did something wrong.

For quadrature, you have to take half of the outputs as is
and the second half inverted and shift the resistors by
half of the register length.

Just draw the waveforms.

--

-TV

 

[George Herold]

On Monday, September 23, 2019 at 12:16:15 PM UTC-4, bitrex wrote:

On 9/23/19 10:34 AM, Rick C wrote:

A two step approximation to a sine wave is always going to look pretty
dreadful - that is why is suggested piecewise linear approximation which
would otherwise work fairly well for a spot frequency - even more so
with a bit of diode shaping to lop the top off.

The important thing that the 2 FF ring does provide is a locked phase
quadrature output which was one of his other unsatisfied requirements..


This 4 flip-flopper with the outputs taken from Q and "delayed" not Q
for two phases the should be good enuff

https://imgur.com/a/SZ6Px9N

I suppose "good enuff" is an engineering criteria. But I don't know why you are tossing away the extra output on each phase? You can use four outputs to drive your analog signals and get something much better for the cost of a resistor. What you are doing is simply horrible and an offense to man and nature! Why???


I was just following e.g. fig 5 in:

https://www.tinaja.com/glib/rad_elec/digital_sinewaves_11_76.pdf

It's not obvious to me how to get a quadrature output from your version
in either four or 8 flop configuration, simply using a set of shifted
resistor values on the not-Q outputs didn't seem to work. But maybe I
did something wrong.

I used a '4017 to make a stepped sine wave like that. First harmonics at
the 11th (or something like that.) The only 'gotcha' was the output impedance of the
'4017 which needed to be factored into the resistor values.

George H.

 

[bitrex]

On 9/23/19 2:16 PM, Tauno Voipio wrote:

On 23.9.19 19:16, bitrex wrote:
On 9/23/19 10:34 AM, Rick C wrote:

A two step approximation to a sine wave is always going to look pretty
dreadful - that is why is suggested piecewise linear approximation
which
would otherwise work fairly well for a spot frequency - even more so
with a bit of diode shaping to lop the top off.

The important thing that the 2 FF ring does provide is a locked phase
quadrature output which was one of his other unsatisfied requirements.


This 4 flip-flopper with the outputs taken from Q and "delayed" not Q
for two phases the should be good enuff

https://imgur.com/a/SZ6Px9N

I suppose "good enuff" is an engineering criteria.  But I don't know
why you are tossing away the extra output on each phase?  You can use
four outputs to drive your analog signals and get something much
better for the cost of a resistor.  What you are doing is simply
horrible and an offense to man and nature!  Why???


I was just following e.g. fig 5 in:

https://www.tinaja.com/glib/rad_elec/digital_sinewaves_11_76.pdf

It's not obvious to me how to get a quadrature output from your
version in either four or 8 flop configuration, simply using a set of
shifted resistor values on the not-Q outputs didn't seem to work. But
maybe I did something wrong.


For quadrature, you have to take half of the outputs as is
and the second half inverted and shift the resistors by
half of the register length.

Just draw the waveforms.

Okay, that works. It was the part about taking half the outputs from Q
and half from not-Q for quadrature I wasn't getting. Thnx

 

[whit3rd]

On Monday, September 23, 2019 at 11:16:56 AM UTC-7, Tauno Voipio wrote:

On 23.9.19 19:16, bitrex wrote:

It's not obvious to me how to get a quadrature output from your version
in either four or 8 flop configuration, simply using a set of shifted
resistor values on the not-Q outputs didn't seem to work.

For quadrature, you have to take half of the outputs as is
and the second half inverted and shift the resistors by
half of the register length.

Or, lengthen the chain by another quarter-cycle worth of flipflops.
The added flipflops are going to replicate the inverse of the early
FFs in the chain, because a half-cycle delay of a sine is its negative.
Keeping it all flipflops takes more energy, but works to higher frequency
because there's no inverter delay.

I keep getting confused; that makes this a good exercise!

 

[bitrex]

On 9/23/19 10:33 PM, whit3rd wrote:

On Monday, September 23, 2019 at 11:16:56 AM UTC-7, Tauno Voipio wrote:
On 23.9.19 19:16, bitrex wrote:

It's not obvious to me how to get a quadrature output from your version
in either four or 8 flop configuration, simply using a set of shifted
resistor values on the not-Q outputs didn't seem to work.

For quadrature, you have to take half of the outputs as is
and the second half inverted and shift the resistors by
half of the register length.

Or, lengthen the chain by another quarter-cycle worth of flipflops.
The added flipflops are going to replicate the inverse of the early
FFs in the chain, because a half-cycle delay of a sine is its negative.
Keeping it all flipflops takes more energy, but works to higher frequency
because there's no inverter delay.

I keep getting confused; that makes this a good exercise!

It would sure help if one of y'all could post a schematic of these ideas
for e.g. 4 and 8 flop cases because I'm a bit confused at this point
too, and I'm not sure if I've got it correct in my sim...

Thanks!

 

[Rick C]

On Monday, September 23, 2019 at 10:33:08 PM UTC-4, whit3rd wrote:

On Monday, September 23, 2019 at 11:16:56 AM UTC-7, Tauno Voipio wrote:
On 23.9.19 19:16, bitrex wrote:

It's not obvious to me how to get a quadrature output from your version
in either four or 8 flop configuration, simply using a set of shifted
resistor values on the not-Q outputs didn't seem to work.

For quadrature, you have to take half of the outputs as is
and the second half inverted and shift the resistors by
half of the register length.

Or, lengthen the chain by another quarter-cycle worth of flipflops.
The added flipflops are going to replicate the inverse of the early
FFs in the chain, because a half-cycle delay of a sine is its negative.
Keeping it all flipflops takes more energy, but works to higher frequency
because there's no inverter delay.

That can be done with no extra chips by using the 8 bit shift register the '164 with four FFs in the ring counter and two others as the follow on.

There is still an inverter delay limiting the FF clock speed at the end of the ring counter chain, but maybe you are referring to the delay of the outputs causing distortion in the waveform.


> I keep getting confused; that makes this a good exercise!

It's not that complex, although I was confused about the nature of the quadrature signal. I think someone mentioned needing only a square wave quadrature signal which is easier to get than the sine wave quadrature signal even if that is also not too hard.

--

Rick C.

++- Get 2,000 miles of free Supercharging
++- Tesla referral code - https://ts.la/richard11209

 

[Rick C]

On Monday, September 23, 2019 at 12:16:15 PM UTC-4, bitrex wrote:

On 9/23/19 10:34 AM, Rick C wrote:

A two step approximation to a sine wave is always going to look pretty
dreadful - that is why is suggested piecewise linear approximation which
would otherwise work fairly well for a spot frequency - even more so
with a bit of diode shaping to lop the top off.

The important thing that the 2 FF ring does provide is a locked phase
quadrature output which was one of his other unsatisfied requirements..


This 4 flip-flopper with the outputs taken from Q and "delayed" not Q
for two phases the should be good enuff

https://imgur.com/a/SZ6Px9N

I suppose "good enuff" is an engineering criteria. But I don't know why you are tossing away the extra output on each phase? You can use four outputs to drive your analog signals and get something much better for the cost of a resistor. What you are doing is simply horrible and an offense to man and nature! Why???


I was just following e.g. fig 5 in:

https://www.tinaja.com/glib/rad_elec/digital_sinewaves_11_76.pdf

I'm pretty sure fig 5 is wrong. The value of the resistors may be reversed, or just wrong. The middle step should be the big one since that is where the sine wave slope is steepest. They show that in the waveform, but that waveform does not match the resistor values. Look at your waveform vs. fig 5.

It's not obvious to me how to get a quadrature output from your version
in either four or 8 flop configuration, simply using a set of shifted
resistor values on the not-Q outputs didn't seem to work. But maybe I
did something wrong.

Here are the waveforms...

http://arius.com/photos/SimpleSine_Filter.jpg

You will need to figure out your opamp biasing since LTspice digital parts are 1 volt logic default and I didn't feel like messing with the details. I actually got a better result with a passive filter but the issues are mostly LTspice vs. the real world I believe.

Here is the schematic, 300 lines. I used 6 FFs of a 14 pin, 8 FF shift register you can buy virtually anywhere, 74xx164 and an inverter you can use your XOR for.

If you want to view the stepped waveform add small resistors in front of C1 and C2 and look at the voltage across these resistors.

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WIRE 544 288 544 192
WIRE 544 288 256 288
WIRE 832 288 832 192
WIRE 832 288 544 288
WIRE 1120 288 1120 192
WIRE 1120 288 832 288
WIRE 1408 288 1408 192
WIRE 1408 288 1120 288
WIRE 1696 288 1696 192
WIRE 1696 288 1408 288
WIRE -704 320 -704 288
WIRE -208 336 -208 240
WIRE -208 336 -544 336
WIRE -16 336 -208 336
WIRE 80 336 80 240
WIRE 80 336 -16 336
WIRE 368 336 368 240
WIRE 368 336 80 336
WIRE 656 336 656 240
WIRE 656 336 368 336
WIRE 944 336 944 240
WIRE 944 336 656 336
WIRE 1232 336 1232 240
WIRE 1232 336 944 336
WIRE 1520 336 1520 240
WIRE 1520 336 1232 336
WIRE 1808 336 1808 240
WIRE 1808 336 1520 336
WIRE -544 368 -544 336
WIRE -704 464 -704 400
WIRE -544 464 -544 448
WIRE -544 464 -704 464
WIRE -544 480 -544 464
FLAG -544 480 0
FLAG -592 288 CLOCK
FLAG -16 336 RESET
FLAG 2112 -224 OUT_A
FLAG -64 144 Q0
FLAG 224 144 Q1
FLAG 512 144 Q2
FLAG 800 144 Q3
FLAG 1088 144 Q4
FLAG 1376 144 Q5
FLAG 1968 144 Q7
FLAG 1664 144 Q6
FLAG 1744 0 0
FLAG 2112 -544 OUT_B
FLAG 656 -208 SUM_A
FLAG 656 -464 SUM_B
FLAG 2176 -64 0
FLAG 2176 -400 0
FLAG 1904 -400 0
FLAG 1904 -80 0
FLAG 1456 -32 0
FLAG 1552 -496 5V
FLAG 1616 -48 0
FLAG 1792 -112 BIAS
FLAG -464 144 Feedback
FLAG 1680 -208 INV_A
FLAG 1680 -464 INV_B
SYMBOL Digital\\dflop 80 96 R0
SYMATTR InstName A1
SYMBOL Digital\\dflop 368 96 R0
SYMATTR InstName A2
SYMBOL Digital\\dflop -208 96 R0
SYMATTR InstName A0
SYMBOL Digital\\dflop 656 96 R0
SYMATTR InstName A3
SYMBOL Digital\\dflop 944 96 R0
SYMATTR InstName A4
SYMBOL Digital\\dflop 1520 96 R0
SYMATTR InstName A6
SYMBOL Digital\\dflop 1808 96 R0
SYMATTR InstName A7
SYMBOL Digital\\dflop 1232 96 R0
SYMATTR InstName A5
SYMBOL Digital\\inv -608 80 R0
SYMATTR InstName A9
SYMBOL voltage -704 304 R0
WINDOW 3 -118 -65 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 1 0 10ns 10ns 250ns 500ns)
SYMATTR InstName V1
SYMBOL voltage -544 352 R0
WINDOW 3 37 91 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 1 0 10ns 10ns 510ns)
SYMATTR InstName RESET
SYMBOL res -48 -176 R0
SYMATTR InstName R1
SYMATTR Value 12.0k
SYMBOL res 240 -176 R0
SYMATTR InstName R2
SYMATTR Value 4.99k
SYMBOL res 528 -176 R0
SYMATTR InstName R3
SYMATTR Value 4.99k
SYMBOL res 816 -176 R0
SYMATTR InstName R4
SYMATTR Value 12.0k
SYMBOL res 464 -432 R0
SYMATTR InstName R5
SYMATTR Value 12.0k
SYMBOL res 752 -432 R0
SYMATTR InstName R6
SYMATTR Value 4.99k
SYMBOL res 1040 -432 R0
SYMATTR InstName R7
SYMATTR Value 4.99k
SYMBOL res 1328 -432 R0
SYMATTR InstName R8
SYMATTR Value 12.0k
SYMBOL res 1728 -112 R0
SYMATTR InstName R9
SYMATTR Value 2.45k
SYMBOL res 1584 -416 R0
SYMATTR InstName R10
SYMATTR Value 4.99k
SYMBOL cap 2000 -320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1nF
SYMBOL cap 2000 -640 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1nF
SYMBOL res 1968 -240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R11
SYMATTR Value 2k
SYMBOL res 1968 -560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R12
SYMATTR Value 2k
SYMBOL res 2160 -192 R0
SYMATTR InstName R13
SYMATTR Value 100k
SYMBOL res 2160 -528 R0
SYMATTR InstName R14
SYMATTR Value 1meg
SYMBOL voltage 1456 -144 R0
WINDOW 3 34 72 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 3.3
SYMATTR InstName V2
SYMBOL cap 1600 -128 R0
SYMATTR InstName C5
SYMATTR Value 0.1ÂľF
SYMBOL Opamps\\LT1215 1904 -192 R0
SYMATTR InstName U1
SYMBOL Opamps\\LT1215 1904 -512 R0
SYMATTR InstName U2
SYMBOL cap 1552 -480 R90
WINDOW 0 59 55 VBottom 2
WINDOW 3 32 -4 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.1ÂľF
SYMBOL cap 1488 -192 R270
WINDOW 0 34 4 VTop 2
WINDOW 3 64 66 VBottom 2
SYMATTR InstName C1
SYMATTR Value 0.1ÂľF
TEXT -304 616 Left 2 !.tran 30us
TEXT -8 616 Left 2 !.options gmin=1e-10 abstol=1e-10 cshunt=1e-16
TEXT 440 392 Left 3 ;74xx164 - 14 pin DIP
TEXT 608 616 Left 2 !.IC V( INV_A)=1.1V V( INV_B)=1.1V V( SUM_A)=0.5 V(SUM_B)=0.5V
RECTANGLE Normal 1920 368 -368 32 1

--

Rick C.

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