Dirty sine wave generator

[bitrex]

Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

<http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif>

 

[bitrex]

On 9/19/19 1:35 AM, bitrex wrote:

Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif

Unfortunately my LTSpice sim of it with 74HC logic models shows
glitching on some transitions that becomes worse with speed:

<https://imgur.com/a/j864h8b>

Don't know yet if shows up in the real circuit.

 

[Jasen Betts]

On 2019-09-19, bitrex <user@example.net> wrote:

On 9/19/19 1:35 AM, bitrex wrote:
Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif


Unfortunately my LTSpice sim of it with 74HC logic models shows
glitching on some transitions that becomes worse with speed:

https://imgur.com/a/j864h8b

Don't know yet if shows up in the real circuit.

Those glitches look real to me. (it's the propogation time of the second
flip-flop) but if you're going to low-pass the output they'll disappear.
ther'll only be a slight saw-toothiness caused by that propogation delay.

If you want glitch-free build a 3 stage johnson counter

--
When I tried casting out nines I made a hash of it.

 

Bill Sloman <bill.sloman@ieee.org> wrote in
news:43eae653-b1ea-4f9b-93f1-69559a0b97e2@googlegroups.com:

On Thursday, September 19, 2019 at 3:35:33 PM UTC+10, bitrex
wrote:
Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple
more flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series
flops/gates to clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif

Probably not.

https://www.tinaja.com/glib/msintro1.pdf

https://www.tinaja.com/magsn01.shtml

offers a more sensible approach. You cook up a long binary number
where the mark-to-space varies along it's length, and cycle it
past a low-pass filter.

Carefully chosen numbers can have zero low harmonic content, but
they do seem to be quite long.

Direct digital synthesis chips are a lot more practical.

Hehehe. Run it through one of the distortion pedals guitarists
use. Definitely has harmonics. ;-)

 

[Bill Sloman]

On Thursday, September 19, 2019 at 3:35:33 PM UTC+10, bitrex wrote:

Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif

Probably not.

https://www.tinaja.com/glib/msintro1.pdf

https://www.tinaja.com/magsn01.shtml

offers a more sensible approach. You cook up a long binary number where the mark-to-space varies along it's length, and cycle it past a low-pass filter.

Carefully chosen numbers can have zero low harmonic content, but they do seem to be quite long.

Direct digital synthesis chips are a lot more practical.

--
Bill Sloman, Sydney

 

[Bill Sloman]

On Thursday, September 19, 2019 at 4:31:20 PM UTC+10, Jasen Betts wrote:

On 2019-09-19, bitrex <user@example.net> wrote:
On 9/19/19 1:35 AM, bitrex wrote:
Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif


Unfortunately my LTSpice sim of it with 74HC logic models shows
glitching on some transitions that becomes worse with speed:

https://imgur.com/a/j864h8b

Don't know yet if shows up in the real circuit.

Those glitches look real to me. (it's the propogation time of the second
flip-flop) but if you're going to low-pass the output they'll disappear.
ther'll only be a slight saw-toothiness caused by that propogation delay.

If you want glitch-free build a 3 stage johnson counter

I suspect the glitches are built-in.

A square wave can be seen as the sum of all the odd harmonics of a sine wave of the same period (with the harmonic amplitude decreasing in proportion to harmonic number).

Bitrex is knocking out the third harmonic content of his basic square wave by subtracting out the first harmonic content of his triple frequency square wave, but this doesn't help with higher harmonics - the odd harmonics of three time the frequency aren't all the odd harmonics of the base frequency..

Not a great idea, and it doesn't get better if you try to elaborate it.

--
Bill Sloman, Sydney

 

[whit3rd]

On Wednesday, September 18, 2019 at 10:35:33 PM UTC-7, bitrex wrote:

Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator...

Well, you can go for small improvements with the 'magic sine waves' approach,
and get a factor of two or four, or the more-parts solution of switched capacitor
filtering (clock at a hundred times the sinewave frequency, there's an MF-10
application note on this somewhere).

The issues, though, are that you only push the harmonic distortions higher in
frequency, they don't go away unless you ALSO have a filter - and that will
limit any adjustment range for the sinewave frequency.

For direct synthesis, any of the lossless audio schemes can put a high quality
sinewave onto your iPod, or boxes with buttons on front can synthesize
the waveforms offered in the menus; usually sine, triangle, square and
sometimes others.

 

[Martin Brown]

On 19/09/2019 06:35, bitrex wrote:

Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif

The faster you try to clock it the worse things will get with
propagation delays in the flip flops as drawn.

To take out most of the 5th harmonic component you will need a divide by
5 counter in the right phase. Each extra component you try to compensate
seriously limits the maximum output frequency that it will work at. The
fundamental will be lowered from f/3 to f/15 by adding this factor.

The least bad fix might be to treat the output as a current source and
integrate it so that you get a step wise linear approximation.
(or aggressively low pass filter against the fifth harmonic and above).

What are you trying to do?

--
Regards,
Martin Brown

 

[Rick C]

On Thursday, September 19, 2019 at 1:59:58 AM UTC-4, bitrex wrote:

On 9/19/19 1:35 AM, bitrex wrote:
Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif


Unfortunately my LTSpice sim of it with 74HC logic models shows
glitching on some transitions that becomes worse with speed:

https://imgur.com/a/j864h8b

Don't know yet if shows up in the real circuit.

If you think that is bad, try looking at the clock input to the first FF.

The circuit is a divide by three to generate (1) and the inverted signal (2), the slowest input to the two bit DAC. That signal should not be glitchy.. The clock signal is the fastest signal, again, not glitchy. When the clock signal changes it takes time for that signal to propagate through the XOR and the two FFs to be combined with the clock signal in the DAC so you get the glitches as the clock changes first, then the signal (2).

To drive a glitchless DAC output with N values, you would need N-1 FFs driven in a thermometer code. This is very practical and would be glitchless since the glitches come from race conditions and a thermometer code only changes one bit at a time. A Johnson ring counter would do the job just fine. So an 8 bit register chip and an inverter (a chip or a transistor) would provide a thermometer code that first fills all the bits, then empties them in the same direction.

000
100
110
111
011
001
000

Use equal weight resistors on the outputs and you get a triangle wave. Tailor the weights with larger resistors at the ends of the thermometer code to shape it more like a sine wave. I'll let you do the math. You can cascade more than one octal register and get a very good sine wave.

--

Rick C.

- Get 2,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

 

[Rick C]

On Thursday, September 19, 2019 at 9:33:21 AM UTC-4, Rick C wrote:

On Thursday, September 19, 2019 at 1:59:58 AM UTC-4, bitrex wrote:
On 9/19/19 1:35 AM, bitrex wrote:
Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif


Unfortunately my LTSpice sim of it with 74HC logic models shows
glitching on some transitions that becomes worse with speed:

https://imgur.com/a/j864h8b

Don't know yet if shows up in the real circuit.

If you think that is bad, try looking at the clock input to the first FF.

The circuit is a divide by three to generate (1) and the inverted signal (2), the slowest input to the two bit DAC. That signal should not be glitchy. The clock signal is the fastest signal, again, not glitchy. When the clock signal changes it takes time for that signal to propagate through the XOR and the two FFs to be combined with the clock signal in the DAC so you get the glitches as the clock changes first, then the signal (2).

To drive a glitchless DAC output with N values, you would need N-1 FFs driven in a thermometer code. This is very practical and would be glitchless since the glitches come from race conditions and a thermometer code only changes one bit at a time. A Johnson ring counter would do the job just fine. So an 8 bit register chip and an inverter (a chip or a transistor) would provide a thermometer code that first fills all the bits, then empties them in the same direction.

000
100
110
111
011
001
000

Use equal weight resistors on the outputs and you get a triangle wave. Tailor the weights with larger resistors at the ends of the thermometer code to shape it more like a sine wave. I'll let you do the math. You can cascade more than one octal register and get a very good sine wave.

https://www.tinaja.com/glib/rad_elec/digital_sinewaves_11_76.pdf

If you use more and more bits in creating your sine wave both the frequency and amplitude of your harmonics are reduced. Filtering may or may not be needed, but will be much more effective by the smaller step sizes.

I use a sigma-delta DAC in a design I build which shows staircase steps in the output waveforms. The steps are small and well above the audio range, so not a problem. Use enough FFs and resistors and your harmonics will be out of the audible range so no filter will be required unless there is some sensitive equipment in the path which I highly doubt.

--

Rick C.

+ Get 2,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209

 

On Thu, 19 Sep 2019 01:35:28 -0400, bitrex <user@example.net> wrote:

Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif

That violates all the usual "rules" of logic design. The clock to the
first flop is gated, and the pair of flops is a ripple counter. Expect
worse glitches if more flops are added in this style.

 

[bitrex]

On 9/19/19 9:33 AM, Rick C wrote:

On Thursday, September 19, 2019 at 1:59:58 AM UTC-4, bitrex wrote:
On 9/19/19 1:35 AM, bitrex wrote:
Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif


Unfortunately my LTSpice sim of it with 74HC logic models shows
glitching on some transitions that becomes worse with speed:

https://imgur.com/a/j864h8b

Don't know yet if shows up in the real circuit.

If you think that is bad, try looking at the clock input to the first FF.

The circuit is a divide by three to generate (1) and the inverted signal (2), the slowest input to the two bit DAC. That signal should not be glitchy. The clock signal is the fastest signal, again, not glitchy. When the clock signal changes it takes time for that signal to propagate through the XOR and the two FFs to be combined with the clock signal in the DAC so you get the glitches as the clock changes first, then the signal (2).

Yep, the input to the XOR and the output of the XOR (in red) shows why
the glitch happens:

<https://imgur.com/a/54VO6jP>

To drive a glitchless DAC output with N values, you would need N-1 FFs driven in a thermometer code. This is very practical and would be glitchless since the glitches come from race conditions and a thermometer code only changes one bit at a time. A Johnson ring counter would do the job just fine. So an 8 bit register chip and an inverter (a chip or a transistor) would provide a thermometer code that first fills all the bits, then empties them in the same direction.

000
100
110
111
011
001
000

Use equal weight resistors on the outputs and you get a triangle wave. Tailor the weights with larger resistors at the ends of the thermometer code to shape it more like a sine wave. I'll let you do the math. You can cascade more than one octal register and get a very good sine wave.

Looking at the waveforms it looks like it might be possible to "lock
out" the glitch by using another flop and gate or two to synchronize the
timing of the inputs to the XOR. that would also be satisfactory

 

[bitrex]

On 9/19/19 4:52 AM, Martin Brown wrote:

On 19/09/2019 06:35, bitrex wrote:
Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif

The faster you try to clock it the worse things will get with
propagation delays in the flip flops as drawn.

To take out most of the 5th harmonic component you will need a divide by
5 counter in the right phase. Each extra component you try to compensate
seriously limits the maximum output frequency that it will work at. The
fundamental will be lowered from f/3 to f/15 by adding this factor.

The least bad fix might be to treat the output as a current source and
integrate it so that you get a step wise linear approximation.
(or aggressively low pass filter against the fifth harmonic and above).

What are you trying to do?

I have an I/Q demodulator/detector scheme that has to run pretty fast at
very low voltage, the 0 degree phase path goes through some op amps with
somewhat limited bandwidth and slew rate because they're low voltage
types. it's fed by a reference clock.

the whole system would work fine with square waves if I had the budget
for infinite GBW and slew rate parts but the op amps I can afford on the
budget in the path don't really have enough GBW and slew rate to support
a square wave at the speed I need to go so, I don't want to shove a raw
square into them like a brutal person.

this would work fine to produce a modified sine and a quadrature square
wave and is just what I need, aside from the glitches which causes
problems down the line. using lower value resistors I can just drive the
input of the analog section directly from the flop outputs, the amps are
single-supply biased at the mid-point of the same supply and just drive
it in, nice.

<https://imgur.com/a/IahCKuJ>

I want to maintain a tight phase relationship between the two signals so
IDK if aggressive low passing is an option here. a couple flops and
gates is within my price/power budget so I'm wishing there was a way to
eliminate the glitch at the source without piling on parts, at that
point I'd likely just resort to DDS. but I'd prefer to be able to
provide a solution that works OK driven by a clock from whatever source
in this case

 

[bitrex]

On 9/19/19 12:17 PM, bitrex wrote:

On 9/19/19 11:31 AM, jlarkin@highlandsniptechnology.com wrote:
On Thu, 19 Sep 2019 01:35:28 -0400, bitrex <user@example.net> wrote:

Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif

That violates all the usual "rules" of logic design. The clock to the
first flop is gated, and the pair of flops is a ripple counter. Expect
worse glitches if more flops are added in this style.


From the age of the drawing and the site it's on looks like it was
designed by communists!!! they probably never ran it fast with their
commmunist-logic so it was okay.

If we are to build a successful gay space communist future in space, for
everyone, then we must correct the failures of the past!

 

[bitrex]

On 9/19/19 11:31 AM, jlarkin@highlandsniptechnology.com wrote:

On Thu, 19 Sep 2019 01:35:28 -0400, bitrex <user@example.net> wrote:

Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif

That violates all the usual "rules" of logic design. The clock to the
first flop is gated, and the pair of flops is a ripple counter. Expect
worse glitches if more flops are added in this style.

From the age of the drawing and the site it's on looks like it was
designed by communists!!! they probably never ran it fast with their
commmunist-logic so it was okay.

The glitch comes from this issue right here with the XOR, with the
output in red and the other two colors inputs:

<https://imgur.com/a/54VO6jP>

Without it, it does produce a quite nice modified sine with a minimum of
parts. I think it might be possible to lock out the glitch by
synchronizing the XOR input with a third flop, maybe.

 

[Rick C]

On Thursday, September 19, 2019 at 11:23:54 AM UTC-4, bitrex wrote:

On 9/19/19 9:33 AM, Rick C wrote:
On Thursday, September 19, 2019 at 1:59:58 AM UTC-4, bitrex wrote:
On 9/19/19 1:35 AM, bitrex wrote:
Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif


Unfortunately my LTSpice sim of it with 74HC logic models shows
glitching on some transitions that becomes worse with speed:

https://imgur.com/a/j864h8b

Don't know yet if shows up in the real circuit.

If you think that is bad, try looking at the clock input to the first FF.

The circuit is a divide by three to generate (1) and the inverted signal (2), the slowest input to the two bit DAC. That signal should not be glitchy. The clock signal is the fastest signal, again, not glitchy. When the clock signal changes it takes time for that signal to propagate through the XOR and the two FFs to be combined with the clock signal in the DAC so you get the glitches as the clock changes first, then the signal (2).

Yep, the input to the XOR and the output of the XOR (in red) shows why
the glitch happens:

https://imgur.com/a/54VO6jP

Yep.

To drive a glitchless DAC output with N values, you would need N-1 FFs driven in a thermometer code. This is very practical and would be glitchless since the glitches come from race conditions and a thermometer code only changes one bit at a time. A Johnson ring counter would do the job just fine. So an 8 bit register chip and an inverter (a chip or a transistor) would provide a thermometer code that first fills all the bits, then empties them in the same direction.

000
100
110
111
011
001
000

Use equal weight resistors on the outputs and you get a triangle wave. Tailor the weights with larger resistors at the ends of the thermometer code to shape it more like a sine wave. I'll let you do the math. You can cascade more than one octal register and get a very good sine wave.


Looking at the waveforms it looks like it might be possible to "lock
out" the glitch by using another flop and gate or two to synchronize the
timing of the inputs to the XOR. that would also be satisfactory

That way lies madness. You said you wanted a better sinewave. Why not use more FFs in a single chip? You can find lots of chips with 8 FFs and if you dig a bit I think you can find 10. Why is one 8 bit chip worse than one 2 bit chip? You will be amazed at the improvement in the quality of the sine wave.

It will require a faster clock. Is that the issue?

--

Rick C.

-- Get 2,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209

 

[Rick C]

On Thursday, September 19, 2019 at 4:18:24 PM UTC-4, Rick C wrote:

On Thursday, September 19, 2019 at 11:23:54 AM UTC-4, bitrex wrote:
On 9/19/19 9:33 AM, Rick C wrote:
On Thursday, September 19, 2019 at 1:59:58 AM UTC-4, bitrex wrote:
On 9/19/19 1:35 AM, bitrex wrote:
Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates to
clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif


Unfortunately my LTSpice sim of it with 74HC logic models shows
glitching on some transitions that becomes worse with speed:

https://imgur.com/a/j864h8b

Don't know yet if shows up in the real circuit.

If you think that is bad, try looking at the clock input to the first FF.

The circuit is a divide by three to generate (1) and the inverted signal (2), the slowest input to the two bit DAC. That signal should not be glitchy. The clock signal is the fastest signal, again, not glitchy. When the clock signal changes it takes time for that signal to propagate through the XOR and the two FFs to be combined with the clock signal in the DAC so you get the glitches as the clock changes first, then the signal (2).

Yep, the input to the XOR and the output of the XOR (in red) shows why
the glitch happens:

https://imgur.com/a/54VO6jP

Yep.


To drive a glitchless DAC output with N values, you would need N-1 FFs driven in a thermometer code. This is very practical and would be glitchless since the glitches come from race conditions and a thermometer code only changes one bit at a time. A Johnson ring counter would do the job just fine. So an 8 bit register chip and an inverter (a chip or a transistor) would provide a thermometer code that first fills all the bits, then empties them in the same direction.

000
100
110
111
011
001
000

Use equal weight resistors on the outputs and you get a triangle wave.. Tailor the weights with larger resistors at the ends of the thermometer code to shape it more like a sine wave. I'll let you do the math. You can cascade more than one octal register and get a very good sine wave.


Looking at the waveforms it looks like it might be possible to "lock
out" the glitch by using another flop and gate or two to synchronize the
timing of the inputs to the XOR. that would also be satisfactory

That way lies madness. You said you wanted a better sinewave. Why not use more FFs in a single chip? You can find lots of chips with 8 FFs and if you dig a bit I think you can find 10. Why is one 8 bit chip worse than one 2 bit chip? You will be amazed at the improvement in the quality of the sine wave.

It will require a faster clock. Is that the issue?

And just to be clear, this design produces no glitches. The glitches are because more than one signal is changing at a time and the timing will never be perfect. So work with a design where only one signal changes at a time.. Johnson ring counter is the way. Use the force Luke.

--

Rick C.

-+ Get 2,000 miles of free Supercharging
-+ Tesla referral code - https://ts.la/richard11209

 

[Martin Brown]

On 19/09/2019 16:02, bitrex wrote:

On 9/19/19 4:52 AM, Martin Brown wrote:
On 19/09/2019 06:35, bitrex wrote:
Is there a way to extrapolate this D flip flop-based/XOR modified
sine-wave generator to be a little less "steppy" using a couple more
flops or XOR gates? or provide outputs of different phases?

I was thinking about a thing using the TinyLogic series flops/gates
to clock it very fast.

http://zpostbox.ru/digital_generators_of_sine_wave_signals_2.gif

The faster you try to clock it the worse things will get with
propagation delays in the flip flops as drawn.

To take out most of the 5th harmonic component you will need a divide
by 5 counter in the right phase. Each extra component you try to
compensate seriously limits the maximum output frequency that it will
work at. The fundamental will be lowered from f/3 to f/15 by adding
this factor.

The least bad fix might be to treat the output as a current source and
integrate it so that you get a step wise linear approximation.
(or aggressively low pass filter against the fifth harmonic and above).

What are you trying to do?


I have an I/Q demodulator/detector scheme that has to run pretty fast at
very low voltage, the 0 degree phase path goes through some op amps with
somewhat limited bandwidth and slew rate because they're low voltage
types. it's fed by a reference clock.

the whole system would work fine with square waves if I had the budget
for infinite GBW and slew rate parts but the op amps I can afford on the
budget in the path don't really have enough GBW and slew rate to support
a square wave at the speed I need to go so, I don't want to shove a raw
square into them like a brutal person.

this would work fine to produce a modified sine and a quadrature square
wave and is just what I need, aside from the glitches which causes
problems down the line. using lower value resistors I can just drive the
input of the analog section directly from the flop outputs, the amps are
single-supply biased at the mid-point of the same supply and just drive
it in, nice.

https://imgur.com/a/IahCKuJ

I want to maintain a tight phase relationship between the two signals so
IDK if aggressive low passing is an option here. a couple flops and
gates is within my price/power budget so I'm wishing there was a way to
eliminate the glitch at the source without piling on parts, at that
point I'd likely just resort to DDS. but I'd prefer to be able to
provide a solution that works OK driven by a clock from whatever source
in this case

How about a 2 flip flop Johnson ring counter then?
That can be configured to generate the quadrature square waves.

Integrate them to a triangle wave and use diode shaping.
How wide a range of frequencies does this have to work at?

--
Regards,
Martin Brown

 

[bitrex]

On 9/20/19 5:47 AM, Martin Brown wrote:

I have an I/Q demodulator/detector scheme that has to run pretty fast
at very low voltage, the 0 degree phase path goes through some op amps
with somewhat limited bandwidth and slew rate because they're low
voltage types. it's fed by a reference clock.

the whole system would work fine with square waves if I had the budget
for infinite GBW and slew rate parts but the op amps I can afford on
the budget in the path don't really have enough GBW and slew rate to
support a square wave at the speed I need to go so, I don't want to
shove a raw square into them like a brutal person.

this would work fine to produce a modified sine and a quadrature
square wave and is just what I need, aside from the glitches which
causes problems down the line. using lower value resistors I can just
drive the input of the analog section directly from the flop outputs,
the amps are single-supply biased at the mid-point of the same supply
and just drive it in, nice.

https://imgur.com/a/IahCKuJ

I want to maintain a tight phase relationship between the two signals
so IDK if aggressive low passing is an option here. a couple flops and
gates is within my price/power budget so I'm wishing there was a way
to eliminate the glitch at the source without piling on parts, at that
point I'd likely just resort to DDS. but I'd prefer to be able to
provide a solution that works OK driven by a clock from whatever
source in this case

How about a 2 flip flop Johnson ring counter then?
That can be configured to generate the quadrature square waves.

Integrate them to a triangle wave and use diode shaping.
How wide a range of frequencies does this have to work at?

Just one, around 200-300kHz. Here's the drive current into my load thru
the op amp network at about 200k (slight visible phase shift is due to
the AD8515 being one of the few low voltage op amps I can find in the
LTSPice library, I'll likely be using the twice-as-fast OPA4332):

<https://imgur.com/a/f3RWq8j>

If not for the glitchin' it'd be near perfect, with only 3 parts. I'm on
a pretty tight budget for per-unit cost...had to blow most of the budget
on fast low voltage op amp....frustrating!

I don't think the glitches will affect the performance much...I may just
try to live with it...compromise...

 

[whit3rd]

On Friday, September 20, 2019 at 8:50:54 AM UTC-7, bitrex wrote:

On 9/20/19 5:47 AM, Martin Brown wrote:

I have an I/Q demodulator/detector scheme that has to run pretty fast
at very low voltage

How about a 2 flip flop Johnson ring counter then?
That can be configured to generate the quadrature square waves.

Integrate them to a triangle wave and use diode shaping.
How wide a range of frequencies does this have to work at?


Just one, around 200-300kHz.

That range allows for some options; the 'integrate' is a filter that
takes the harmonics down 3 dB/octave, but you can just
as easily use a double-tuned IF transformer, and get 12 dB/octave.
Some of 'em can be slug-tuned, too. It's power-stingy, and in quantity, those
little wire twists are really inexpensive.

Standard off-the-shelf designs would take some external capacitors to pull
to your frequency range (from 457 kHz), but a manufacturer can build them
for any center frequency, and with your choice of input and output impedance.