Digesting runs of ones or zeros "well"

John,

I did something similar to this in a Spartan II. I was searching
through a 2^7-1 PRBS pattern (at the output of a SERDES, data bus is
10-bits wide) for the longest string of zeros. Granted the longest
string of zeros in a 2^7-1 PRBS pattern is 6, the idea could be
extrapolated to longer strings like 9 in a 65-bit wide bus.

Here's an example of what I did for searching for 6 zeros in a row.
You'll notice that in my casez statement, I'm actually searching for 6
ones in a row. This is because the BERT that I was using inverted
it's output PRBS pattern.

always @(posedge clock1)
begin
casez (datasi[9:0])
10'b???111111? : Q[9:0] = {datasi[9:8],7'b1111111,datasi[0]};
default : Q[9:0] = datasi[9:0];
endcase
end

Once you find the string that you're looking for, you can do what ever
you'd like.

Hope this helps,

Jeremy

johnhandwork@mail.com (John_H) wrote in message news:<6c803f5f.0310060552.267dc963@posting.google.com>...
"Morten Leikvoll" <m-leik@online.nospam> wrote in message news:<5z9gb.28389$os2.397003@news2.e.nsc.no>...
I just started reading this thread.. Am I correct if you really want to
detect 9 EQUAL bits in a row from a stream?
Could you not do this just with a 4bits counter and a comparator/zero
detector?

Correct, I need "equal" bits, either 9'h000 or 9'h1ff, starting from
0, 8, 16, ... 56.

The input is 65 bits per clock with a fast clock, output from BlockRAM
which was loaded at full width.

Counters require more than one clock.
 
I'm afraid I'm lost. The example you give shows a single alignment for a
6-ones check. There are 10 total alignments that can apply. Once detected,
there doesn't seem to be an indication THAT the detection occurred except
that one of the bits from the SERDES is now a one (by definition of your
pattern, it would have been a zero).

Were you suggesting that, in general, a casez might produce good results
from the synthesizer for run detection?

"Jeremy Webb" <jeremywebb@ieee.org> wrote in message
news:4d807c8a.0310091158.5a0ba215@posting.google.com...
John,

I did something similar to this in a Spartan II. I was searching
through a 2^7-1 PRBS pattern (at the output of a SERDES, data bus is
10-bits wide) for the longest string of zeros. Granted the longest
string of zeros in a 2^7-1 PRBS pattern is 6, the idea could be
extrapolated to longer strings like 9 in a 65-bit wide bus.

Here's an example of what I did for searching for 6 zeros in a row.
You'll notice that in my casez statement, I'm actually searching for 6
ones in a row. This is because the BERT that I was using inverted
it's output PRBS pattern.

always @(posedge clock1)
begin
casez (datasi[9:0])
10'b???111111? : Q[9:0] = {datasi[9:8],7'b1111111,datasi[0]};
default : Q[9:0] = datasi[9:0];
endcase
end

Once you find the string that you're looking for, you can do what ever
you'd like.

Hope this helps,

Jeremy

johnhandwork@mail.com (John_H) wrote in message
news:<6c803f5f.0310060552.267dc963@posting.google.com>...
"Morten Leikvoll" <m-leik@online.nospam> wrote in message
news:<5z9gb.28389$os2.397003@news2.e.nsc.no>...
I just started reading this thread.. Am I correct if you really want
to
detect 9 EQUAL bits in a row from a stream?
Could you not do this just with a 4bits counter and a comparator/zero
detector?

Correct, I need "equal" bits, either 9'h000 or 9'h1ff, starting from
0, 8, 16, ... 56.

The input is 65 bits per clock with a fast clock, output from BlockRAM
which was loaded at full width.

Counters require more than one clock.
 
Ray Andraka wrote:
I'd rather use a function or procedure within the HDL so that the
boolean expression is in the code and is used directly to generate
the init value.
Not possible for the HDL which is not a complete
programming language ;-)
 
Depends on the HDL. VHDL certainly is. There is a link on my links
page of my website to an example of some VHDL that does exactly this,
which IIRC is a function call.

Tim wrote:

Ray Andraka wrote:
I'd rather use a function or procedure within the HDL so that the
boolean expression is in the code and is used directly to generate
the init value.

Not possible for the HDL which is not a complete
programming language ;-)
--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759
 
John,

This was only a snippit of my code. In my final design I accounted
for all possible rotations of the code. Using the casez worked quite
well in my application. Sorry for any confusion.

Sincerely,

Jeremy

"John_H" <johnhandwork@mail.com> wrote in message news:<9Sjhb.18$jU3.8636@news-west.eli.net>...
I'm afraid I'm lost. The example you give shows a single alignment for a
6-ones check. There are 10 total alignments that can apply. Once detected,
there doesn't seem to be an indication THAT the detection occurred except
that one of the bits from the SERDES is now a one (by definition of your
pattern, it would have been a zero).

Were you suggesting that, in general, a casez might produce good results
from the synthesizer for run detection?

"Jeremy Webb" <jeremywebb@ieee.org> wrote in message
news:4d807c8a.0310091158.5a0ba215@posting.google.com...
John,

I did something similar to this in a Spartan II. I was searching
through a 2^7-1 PRBS pattern (at the output of a SERDES, data bus is
10-bits wide) for the longest string of zeros. Granted the longest
string of zeros in a 2^7-1 PRBS pattern is 6, the idea could be
extrapolated to longer strings like 9 in a 65-bit wide bus.

Here's an example of what I did for searching for 6 zeros in a row.
You'll notice that in my casez statement, I'm actually searching for 6
ones in a row. This is because the BERT that I was using inverted
it's output PRBS pattern.

always @(posedge clock1)
begin
casez (datasi[9:0])
10'b???111111? : Q[9:0] = {datasi[9:8],7'b1111111,datasi[0]};
default : Q[9:0] = datasi[9:0];
endcase
end

Once you find the string that you're looking for, you can do what ever
you'd like.

Hope this helps,

Jeremy

johnhandwork@mail.com (John_H) wrote in message
news:<6c803f5f.0310060552.267dc963@posting.google.com>...
"Morten Leikvoll" <m-leik@online.nospam> wrote in message
news:<5z9gb.28389$os2.397003@news2.e.nsc.no>...
I just started reading this thread.. Am I correct if you really want
to
detect 9 EQUAL bits in a row from a stream?
Could you not do this just with a 4bits counter and a comparator/zero
detector?

Correct, I need "equal" bits, either 9'h000 or 9'h1ff, starting from
0, 8, 16, ... 56.

The input is 65 bits per clock with a fast clock, output from BlockRAM
which was loaded at full width.

Counters require more than one clock.
 
Tim,

Philip pointed out that my link was to your website, which I totally
missed. Got a good laugh out of Philip's pointing it out though!


Ray Andraka wrote:

Depends on the HDL. VHDL certainly is. There is a link on my links
page of my website to an example of some VHDL that does exactly this,
which IIRC is a function call.

Tim wrote:

Ray Andraka wrote:
I'd rather use a function or procedure within the HDL so that the
boolean expression is in the code and is used directly to generate
the init value.

Not possible for the HDL which is not a complete
programming language ;-)

--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759
--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759
 

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