Design is too large for the device! xc3s400

[glen herrmannsfeldt]

Ray Andraka wrote:

(snip)

Why is it difficult to understand or modify?

It is just a counter that gets loaded with (delay-2) and then counts
down until it becomes -1, and then reloaded. The load value can be
changed at any time, and takes effect the next time the counter reaches
the terminal count of -1 (this downcounter has the advantage of not
requiring any decoding, and of having an easily adjusted modulus). The
counter output becomes the address to the memory. I think it is pretty
straightforward to comprehend, do you find it otherwise? The only
difference is just being a little clever in the counting and taking
advantage of the read before write capability of the memory.
As far as modifying it, I'm not sure I see the difficulty there
either: The modulus is easy to change, and in particular can be easily
changed dynamically. You can easily change the width of the counter for
different aspect ratios on the memory, say for instance if you wanted to
delay a 9 bit signal by a delay not to exceed 2048 clocks. Beyond that,
I'm not sure what modifications you'd want to make, or for that matter
what modifications that wouldn't be as difficult in the two port scheme
you offered.

It would seem to perform better if you change the length while it
is running. Though at some point changing the length of a running
shift register is not so well defined, but the results in Peter's
case are a little strange.

-- glen