J
John Larkin
Guest
On Tue, 2 May 2023 07:08:24 -0700 (PDT), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:
Pity it\'s going away.
One fix I sometimes do to long haywire shift register strings is add
biggish resistors in the data connections, to slow things down and
avoid clock skew hazards.
<langwadt@fonz.dk> wrote:
mandag den 1. maj 2023 kl. 20.45.29 UTC+2 skrev John Larkin:
On Mon, 1 May 2023 09:23:23 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:
mandag den 1. maj 2023 kl. 18.11.52 UTC+2 skrev John Larkin:
On Mon, 1 May 2023 08:27:20 -0000 (UTC), Jasen Betts
use...@revmaps.no-ip.org> wrote:
On 2023-04-30, John Larkin <jla...@highlandSNIPMEtechnology.com> wrote:
On Sun, 30 Apr 2023 15:02:37 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:
On 2023-04-30 14:46, John Larkin wrote:> On Sun, 30 Apr 2023 13:13:18
-0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:
On 2023-04-30 10:51, John Larkin wrote:
On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk...@arcor.de
wrote:
Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.
I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.
Here\'s a trial placement, just to see what might fit.
https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1
We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.
I do need to be sure that the relays won\'t interact magnetically.
The coils will generate heat too, brickwalled like that. I think
we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up
to 24
for a few milliseconds, whenever we change the pattern. [1]
What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.
We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.
One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.
I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.
You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.
Sure, add diodes and do the relay version of charlieplexing LEDs.
Wouldn\'t that take two diodes (one dual) per relay?
I was actually teasing--I don\'t think you can usefully charlieplex relays.
Charlieplexing relies on two features of LEDs: they only conduct in one
direction, and they have this huge forward voltage, so if you have two
in series driven from a lowish voltage, nothing happens. The latter is
also true of relays if they start out inactive, but not necessarily if
they\'re already active.
Relay data sheets are universally awful. Among other things, they
seldom provide the numbers you need to exploit the pullin/dropout
differential.
Full voltage to energize and 0.7 of that, half coil power, to hold
usually works, but isn\'t generally guaranteed.
It might be fun to think about, but I doubt there\'s a genuinely useful
application.
Cheers
Phil Hobbs
The efinix FPGA costs about 5 cents per gpio and takes very little
board area.
Not competitive against ~6 cent SIPO shift registers like SN74HCS595DYYR.
You might have to push a couple of the MOSFETs to the side slightly, but
at 3.3x4.3mm footprint they should fit under your relays. (other side
of board)
The 5V capable outputs will also make more MOSFETs usable - possibly
a further saving.
Digikey stocks those for about 12 cents. Given that I had enough FPGA
pins to go full parallel, the shift register saves running 100+ traces
into the relay array, the downside being that the clock distribution
will need to be handled carefully in an already nightmarish layout.
SN74HCS595DYYR are 0ns holds so if you route the clock in the opposite direction of the data it should always work
I\'d still need avalanche-tolerant mosfets or fets plus catch diodes.
Given 3.3 volt logic from my FPGA, the shift registers would have to
run from 3.3, or something close, for level compatibility.
Thanks for the suggestion; it\'s another possibility.
74HCT at 5V is compatible with 3.3V logic
74HCT4094 does clock edge tricks to work around clock:data skew
hazards. And it could run from 5 volts and accept 3.3v inputs.
https://www.mouser.dk/ProductDetail/Nexperia/NPIC6C596APW-Q100J?qs=M%2FOdCRO8QQ1YWSXlJFSqpg%3D%3D
end-of-life, but mouser has 30K-50k in stock of many of the various versions
Pity it\'s going away.
One fix I sometimes do to long haywire shift register strings is add
biggish resistors in the data connections, to slow things down and
avoid clock skew hazards.