density...

[John Larkin]

Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up to 24
for a few milliseconds, whenever we change the pattern. [1]

My production people think they have ideas for placing 100+ relays
efficiently.

I have about 10 square inches on the right for the rest of the stuff
I\'ll need. And there\'s always the bottom of the board.


[1] sorta like the Austin-Healey overdrive solenoid.

 

[Gerhard Hoffmann]

Am 30.04.23 um 00:18 schrieb John Larkin:

Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

Gerhard

 

[server]

On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk4xp@arcor.de>
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

Put the bistable relays in an 11 x 12 relay array and drive the row
and column lines with tri-states out pits.This would activate a single
relay at a time with 8 processor pins and two decoders.

If multiple relays need to be activated simultaneously, put them in
the same column, this will require 12 row lines and 4 decoded column
lines.

Of course the problem with bistatic relays is how to set the initial
power on state.

I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

Gerhard

 

[John Larkin]

On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk4xp@arcor.de>
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.

I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Thermal and magnetic interaction could be mitigated by relay placement
and coil polarities. That would be an insanely complex puzzle.
Fortunately, many of these relays specify a coil polarity. But I could
substitute rotation to maintain the horror.

Gerhard

 

[John Larkin]

On Sun, 30 Apr 2023 12:19:55 +0300, upsidedown@downunder.com wrote:

On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

Put the bistable relays in an 11 x 12 relay array and drive the row
and column lines with tri-states out pits.This would activate a single
relay at a time with 8 processor pins and two decoders.

Does that work, driving latching relays in a matrix? There would be
sneak paths to unintended relays.

If that worked, one in principle could matrix-PWM non-latching relays.

One tiny mosfet and one FPGA pin per relay is sure easy. I drew a
second FPGA as the relay driver but I probably have enough free pins
on the usual FPGA.

The stuff on the left side of the board is our \"template\" for all the
plugin boards in this family. It looks like that FPGA has 154 free
GPIOs, and I\'ll only need about 125 or so.

If multiple relays need to be activated simultaneously, put them in
the same column, this will require 12 row lines and 4 decoded column
lines.

Of course the problem with bistatic relays is how to set the initial
power on state.

That too.

I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

Gerhard

 

[Phil Hobbs]

On 2023-04-30 10:51, John Larkin wrote:

On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.



I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Sure, add diodes and do the relay version of charlieplexing LEDs.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[John Larkin]

On Sun, 30 Apr 2023 13:13:18 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:
On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.



I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Sure, add diodes and do the relay version of charlieplexing LEDs.

Wouldn\'t that take two diodes (one dual) per relay?

Cheers

Phil Hobbs

Given non-latching relays, the drive duty cycle would need to go down
as I allow multiple relays to be on simultaneously. And the voltage
would correspondingly go up!

If I have 100 or so FPGA pins free, it will take just one
avalanche-rated logic-level SOT23 n-fet per relay.

 

[Lasse Langwadt Christensen]

søndag den 30. april 2023 kl. 20.46.16 UTC+2 skrev John Larkin:

On Sun, 30 Apr 2023 13:13:18 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:
On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk...@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.



I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Sure, add diodes and do the relay version of charlieplexing LEDs.
Wouldn\'t that take two diodes (one dual) per relay?


Cheers

Phil Hobbs


Given non-latching relays, the drive duty cycle would need to go down
as I allow multiple relays to be on simultaneously. And the voltage
would correspondingly go up!

If I have 100 or so FPGA pins free, it will take just one
avalanche-rated logic-level SOT23 n-fet per relay.

or ULN2003 et. al.

 

[Phil Hobbs]

On 2023-04-30 14:46, John Larkin wrote:> On Sun, 30 Apr 2023 13:13:18
-0400, Phil Hobbs

pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:
On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think
we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up
to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.



I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Sure, add diodes and do the relay version of charlieplexing LEDs.

Wouldn\'t that take two diodes (one dual) per relay?
I was actually teasing--I don\'t think you can usefully charlieplex relays.

Charlieplexing relies on two features of LEDs: they only conduct in one
direction, and they have this huge forward voltage, so if you have two
in series driven from a lowish voltage, nothing happens. The latter is
also true of relays if they start out inactive, but not necessarily if
they\'re already active.

It might be fun to think about, but I doubt there\'s a genuinely useful
application.

Cheers

Phil Hobbs

 

[Lasse Langwadt Christensen]

søndag den 30. april 2023 kl. 21.02.50 UTC+2 skrev Phil Hobbs:

On 2023-04-30 14:46, John Larkin wrote:> On Sun, 30 Apr 2023 13:13:18
-0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:
On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk...@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think
we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up
to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least..
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.



I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Sure, add diodes and do the relay version of charlieplexing LEDs.

Wouldn\'t that take two diodes (one dual) per relay?
I was actually teasing--I don\'t think you can usefully charlieplex relays..

Charlieplexing relies on two features of LEDs: they only conduct in one
direction, and they have this huge forward voltage, so if you have two
in series driven from a lowish voltage, nothing happens. The latter is
also true of relays if they start out inactive, but not necessarily if
they\'re already active.

It might be fun to think about, but I doubt there\'s a genuinely useful
application.

but with enough voltage to make pwm work, row/column multiplexing could work

 

[John Larkin]

On Sun, 30 Apr 2023 15:02:37 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2023-04-30 14:46, John Larkin wrote:> On Sun, 30 Apr 2023 13:13:18
-0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:
On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think
we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up
to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.



I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Sure, add diodes and do the relay version of charlieplexing LEDs.

Wouldn\'t that take two diodes (one dual) per relay?
I was actually teasing--I don\'t think you can usefully charlieplex relays.

Charlieplexing relies on two features of LEDs: they only conduct in one
direction, and they have this huge forward voltage, so if you have two
in series driven from a lowish voltage, nothing happens. The latter is
also true of relays if they start out inactive, but not necessarily if
they\'re already active.

Relay data sheets are universally awful. Among other things, they
seldom provide the numbers you need to exploit the pullin/dropout
differential.

Full voltage to energize and 0.7 of that, half coil power, to hold
usually works, but isn\'t generally guaranteed.

It might be fun to think about, but I doubt there\'s a genuinely useful
application.

Cheers

Phil Hobbs

The efinix FPGA costs about 5 cents per gpio and takes very little
board area.

Maybe someone could start a business defining some useful functions
and selling programmed serial flash chips to program an FPGA to do
them. Or sell the functions in FPGAs that have internal flash.

 

[John Larkin]

On Sun, 30 Apr 2023 11:59:52 -0700 (PDT), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

søndag den 30. april 2023 kl. 20.46.16 UTC+2 skrev John Larkin:
On Sun, 30 Apr 2023 13:13:18 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:
On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk...@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.



I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Sure, add diodes and do the relay version of charlieplexing LEDs.
Wouldn\'t that take two diodes (one dual) per relay?


Cheers

Phil Hobbs


Given non-latching relays, the drive duty cycle would need to go down
as I allow multiple relays to be on simultaneously. And the voltage
would correspondingly go up!

If I have 100 or so FPGA pins free, it will take just one
avalanche-rated logic-level SOT23 n-fet per relay.

or ULN2003 et. al.

We stock them too, in SO16. They would probably go under the relay
matrix, on the back side of the board. I was intending to use the TI
shift registers as the relay drivers, but they won\'t squeeze between
the pins of the relays.

The ULN2003 *does* fit between the relay pins on the bottom of the
board!

 

[whit3rd]

On Sunday, April 30, 2023 at 12:02:50 PM UTC-7, Phil Hobbs wrote:

On 2023-04-30 14:46, John Larkin wrote:> On Sun, 30 Apr 2023 13:13:18
-0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:

Sure, add diodes and do the relay version of charlieplexing LEDs.

Wouldn\'t that take two diodes (one dual) per relay?
I was actually teasing--I don\'t think you can usefully charlieplex relays..

Charlieplexing relies on two features of LEDs: they only conduct in one
direction, and they have this huge forward voltage, so...

Don\'t some relays come with a builtin quench diode on the coil (in parallel)?
Those have matching features to the LED case, if you look at the
polarity-dependence of coil current.

 

[John Larkin]

On Sun, 30 Apr 2023 14:15:40 -0700 (PDT), whit3rd <whit3rd@gmail.com>
wrote:

On Sunday, April 30, 2023 at 12:02:50?PM UTC-7, Phil Hobbs wrote:
On 2023-04-30 14:46, John Larkin wrote:> On Sun, 30 Apr 2023 13:13:18
-0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:

Sure, add diodes and do the relay version of charlieplexing LEDs.

Wouldn\'t that take two diodes (one dual) per relay?
I was actually teasing--I don\'t think you can usefully charlieplex relays.

Charlieplexing relies on two features of LEDs: they only conduct in one
direction, and they have this huge forward voltage, so...

Don\'t some relays come with a builtin quench diode on the coil (in parallel)?
Those have matching features to the LED case, if you look at the
polarity-dependence of coil current.

I haven\'t seen any. I do want a multi-sourced relay, in a standard
10x20 mm case.

I think some relays have a magnet inside, which makes the coil
polarity matter. Latching relays seem to care.

The ULN2003, suggested by Lasse, has 7 darlington drivers with catch
diodes. That\'s pretty good. I\'d need about 16 of them.

I\'ll also use a dozen or so SSRs, probably the Ixys CPC1540. I can
drive them directly from my FPGA, with maybe a series resistor.

 

[Jasen Betts]

On 2023-04-30, John Larkin <jlarkin@highlandSNIPMEtechnology.com> wrote:

On Sun, 30 Apr 2023 15:02:37 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2023-04-30 14:46, John Larkin wrote:> On Sun, 30 Apr 2023 13:13:18
-0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:
On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think
we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up
to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.



I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Sure, add diodes and do the relay version of charlieplexing LEDs.

Wouldn\'t that take two diodes (one dual) per relay?
I was actually teasing--I don\'t think you can usefully charlieplex relays.

Charlieplexing relies on two features of LEDs: they only conduct in one
direction, and they have this huge forward voltage, so if you have two
in series driven from a lowish voltage, nothing happens. The latter is
also true of relays if they start out inactive, but not necessarily if
they\'re already active.

Relay data sheets are universally awful. Among other things, they
seldom provide the numbers you need to exploit the pullin/dropout
differential.

Full voltage to energize and 0.7 of that, half coil power, to hold
usually works, but isn\'t generally guaranteed.


It might be fun to think about, but I doubt there\'s a genuinely useful
application.

Cheers

Phil Hobbs

The efinix FPGA costs about 5 cents per gpio and takes very little
board area.

Not competitive against ~6 cent SIPO shift registers like SN74HCS595DYYR.
You might have to push a couple of the MOSFETs to the side slightly, but
at 3.3x4.3mm footprint they should fit under your relays. (other side
of board)

The 5V capable outputs will also make more MOSFETs usable - possibly
a further saving.

Maybe someone could start a business defining some useful functions
and selling programmed serial flash chips to program an FPGA to do
them. Or sell the functions in FPGAs that have internal flash.

pre-programmed chips are a available from several vendors.
--
Jasen.
🇺🇦 Слава Україні

 

[John Larkin]

On Mon, 1 May 2023 08:27:20 -0000 (UTC), Jasen Betts
<usenet@revmaps.no-ip.org> wrote:

On 2023-04-30, John Larkin <jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sun, 30 Apr 2023 15:02:37 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2023-04-30 14:46, John Larkin wrote:> On Sun, 30 Apr 2023 13:13:18
-0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:
On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think
we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up
to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.



I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Sure, add diodes and do the relay version of charlieplexing LEDs.

Wouldn\'t that take two diodes (one dual) per relay?
I was actually teasing--I don\'t think you can usefully charlieplex relays.

Charlieplexing relies on two features of LEDs: they only conduct in one
direction, and they have this huge forward voltage, so if you have two
in series driven from a lowish voltage, nothing happens. The latter is
also true of relays if they start out inactive, but not necessarily if
they\'re already active.

Relay data sheets are universally awful. Among other things, they
seldom provide the numbers you need to exploit the pullin/dropout
differential.

Full voltage to energize and 0.7 of that, half coil power, to hold
usually works, but isn\'t generally guaranteed.


It might be fun to think about, but I doubt there\'s a genuinely useful
application.

Cheers

Phil Hobbs

The efinix FPGA costs about 5 cents per gpio and takes very little
board area.

Not competitive against ~6 cent SIPO shift registers like SN74HCS595DYYR.
You might have to push a couple of the MOSFETs to the side slightly, but
at 3.3x4.3mm footprint they should fit under your relays. (other side
of board)

The 5V capable outputs will also make more MOSFETs usable - possibly
a further saving.

Digikey stocks those for about 12 cents. Given that I had enough FPGA
pins to go full parallel, the shift register saves running 100+ traces
into the relay array, the downside being that the clock distribution
will need to be handled carefully in an already nightmarish layout.

I\'d still need avalanche-tolerant mosfets or fets plus catch diodes.
Given 3.3 volt logic from my FPGA, the shift registers would have to
run from 3.3, or something close, for level compatibility.

Thanks for the suggestion; it\'s another possibility.

Maybe someone could start a business defining some useful functions
and selling programmed serial flash chips to program an FPGA to do
them. Or sell the functions in FPGAs that have internal flash.

pre-programmed chips are a available from several vendors.

 

[Lasse Langwadt Christensen]

mandag den 1. maj 2023 kl. 18.11.52 UTC+2 skrev John Larkin:

On Mon, 1 May 2023 08:27:20 -0000 (UTC), Jasen Betts
use...@revmaps.no-ip.org> wrote:

On 2023-04-30, John Larkin <jla...@highlandSNIPMEtechnology.com> wrote:
On Sun, 30 Apr 2023 15:02:37 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 2023-04-30 14:46, John Larkin wrote:> On Sun, 30 Apr 2023 13:13:18
-0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:
On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk...@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think
we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up
to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.



I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Sure, add diodes and do the relay version of charlieplexing LEDs.

Wouldn\'t that take two diodes (one dual) per relay?
I was actually teasing--I don\'t think you can usefully charlieplex relays.

Charlieplexing relies on two features of LEDs: they only conduct in one
direction, and they have this huge forward voltage, so if you have two
in series driven from a lowish voltage, nothing happens. The latter is
also true of relays if they start out inactive, but not necessarily if
they\'re already active.

Relay data sheets are universally awful. Among other things, they
seldom provide the numbers you need to exploit the pullin/dropout
differential.

Full voltage to energize and 0.7 of that, half coil power, to hold
usually works, but isn\'t generally guaranteed.


It might be fun to think about, but I doubt there\'s a genuinely useful
application.

Cheers

Phil Hobbs

The efinix FPGA costs about 5 cents per gpio and takes very little
board area.

Not competitive against ~6 cent SIPO shift registers like SN74HCS595DYYR.
You might have to push a couple of the MOSFETs to the side slightly, but
at 3.3x4.3mm footprint they should fit under your relays. (other side
of board)

The 5V capable outputs will also make more MOSFETs usable - possibly
a further saving.
Digikey stocks those for about 12 cents. Given that I had enough FPGA
pins to go full parallel, the shift register saves running 100+ traces
into the relay array, the downside being that the clock distribution
will need to be handled carefully in an already nightmarish layout.

SN74HCS595DYYR are 0ns holds so if you route the clock in the opposite direction of the data it should always work

I\'d still need avalanche-tolerant mosfets or fets plus catch diodes.
Given 3.3 volt logic from my FPGA, the shift registers would have to
run from 3.3, or something close, for level compatibility.

Thanks for the suggestion; it\'s another possibility.

74HCT at 5V is compatible with 3.3V logic

 

[John Larkin]

On Mon, 1 May 2023 09:23:23 -0700 (PDT), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

mandag den 1. maj 2023 kl. 18.11.52 UTC+2 skrev John Larkin:
On Mon, 1 May 2023 08:27:20 -0000 (UTC), Jasen Betts
use...@revmaps.no-ip.org> wrote:

On 2023-04-30, John Larkin <jla...@highlandSNIPMEtechnology.com> wrote:
On Sun, 30 Apr 2023 15:02:37 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 2023-04-30 14:46, John Larkin wrote:> On Sun, 30 Apr 2023 13:13:18
-0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:
On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk...@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think
we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up
to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.



I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Sure, add diodes and do the relay version of charlieplexing LEDs.

Wouldn\'t that take two diodes (one dual) per relay?
I was actually teasing--I don\'t think you can usefully charlieplex relays.

Charlieplexing relies on two features of LEDs: they only conduct in one
direction, and they have this huge forward voltage, so if you have two
in series driven from a lowish voltage, nothing happens. The latter is
also true of relays if they start out inactive, but not necessarily if
they\'re already active.

Relay data sheets are universally awful. Among other things, they
seldom provide the numbers you need to exploit the pullin/dropout
differential.

Full voltage to energize and 0.7 of that, half coil power, to hold
usually works, but isn\'t generally guaranteed.


It might be fun to think about, but I doubt there\'s a genuinely useful
application.

Cheers

Phil Hobbs

The efinix FPGA costs about 5 cents per gpio and takes very little
board area.

Not competitive against ~6 cent SIPO shift registers like SN74HCS595DYYR.
You might have to push a couple of the MOSFETs to the side slightly, but
at 3.3x4.3mm footprint they should fit under your relays. (other side
of board)

The 5V capable outputs will also make more MOSFETs usable - possibly
a further saving.
Digikey stocks those for about 12 cents. Given that I had enough FPGA
pins to go full parallel, the shift register saves running 100+ traces
into the relay array, the downside being that the clock distribution
will need to be handled carefully in an already nightmarish layout.

SN74HCS595DYYR are 0ns holds so if you route the clock in the opposite direction of the data it should always work

I\'d still need avalanche-tolerant mosfets or fets plus catch diodes.
Given 3.3 volt logic from my FPGA, the shift registers would have to
run from 3.3, or something close, for level compatibility.

Thanks for the suggestion; it\'s another possibility.

74HCT at 5V is compatible with 3.3V logic

74HCT4094 does clock edge tricks to work around clock:data skew
hazards. And it could run from 5 volts and accept 3.3v inputs.

 

[Lasse Langwadt Christensen]

mandag den 1. maj 2023 kl. 20.45.29 UTC+2 skrev John Larkin:

On Mon, 1 May 2023 09:23:23 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

mandag den 1. maj 2023 kl. 18.11.52 UTC+2 skrev John Larkin:
On Mon, 1 May 2023 08:27:20 -0000 (UTC), Jasen Betts
use...@revmaps.no-ip.org> wrote:

On 2023-04-30, John Larkin <jla...@highlandSNIPMEtechnology.com> wrote:
On Sun, 30 Apr 2023 15:02:37 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 2023-04-30 14:46, John Larkin wrote:> On Sun, 30 Apr 2023 13:13:18
-0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:
On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk...@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think
we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up
to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.



I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Sure, add diodes and do the relay version of charlieplexing LEDs.

Wouldn\'t that take two diodes (one dual) per relay?
I was actually teasing--I don\'t think you can usefully charlieplex relays.

Charlieplexing relies on two features of LEDs: they only conduct in one
direction, and they have this huge forward voltage, so if you have two
in series driven from a lowish voltage, nothing happens. The latter is
also true of relays if they start out inactive, but not necessarily if
they\'re already active.

Relay data sheets are universally awful. Among other things, they
seldom provide the numbers you need to exploit the pullin/dropout
differential.

Full voltage to energize and 0.7 of that, half coil power, to hold
usually works, but isn\'t generally guaranteed.


It might be fun to think about, but I doubt there\'s a genuinely useful
application.

Cheers

Phil Hobbs

The efinix FPGA costs about 5 cents per gpio and takes very little
board area.

Not competitive against ~6 cent SIPO shift registers like SN74HCS595DYYR.
You might have to push a couple of the MOSFETs to the side slightly, but
at 3.3x4.3mm footprint they should fit under your relays. (other side
of board)

The 5V capable outputs will also make more MOSFETs usable - possibly
a further saving.
Digikey stocks those for about 12 cents. Given that I had enough FPGA
pins to go full parallel, the shift register saves running 100+ traces
into the relay array, the downside being that the clock distribution
will need to be handled carefully in an already nightmarish layout.

SN74HCS595DYYR are 0ns holds so if you route the clock in the opposite direction of the data it should always work

I\'d still need avalanche-tolerant mosfets or fets plus catch diodes.
Given 3.3 volt logic from my FPGA, the shift registers would have to
run from 3.3, or something close, for level compatibility.

Thanks for the suggestion; it\'s another possibility.

74HCT at 5V is compatible with 3.3V logic


74HCT4094 does clock edge tricks to work around clock:data skew
hazards. And it could run from 5 volts and accept 3.3v inputs.

as long as you route the clock backwards so it arrives at the last register first and first register last
and Tpd > Th there\'s no hazard

 

[Lasse Langwadt Christensen]

mandag den 1. maj 2023 kl. 20.45.29 UTC+2 skrev John Larkin:

On Mon, 1 May 2023 09:23:23 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

mandag den 1. maj 2023 kl. 18.11.52 UTC+2 skrev John Larkin:
On Mon, 1 May 2023 08:27:20 -0000 (UTC), Jasen Betts
use...@revmaps.no-ip.org> wrote:

On 2023-04-30, John Larkin <jla...@highlandSNIPMEtechnology.com> wrote:
On Sun, 30 Apr 2023 15:02:37 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 2023-04-30 14:46, John Larkin wrote:> On Sun, 30 Apr 2023 13:13:18
-0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 2023-04-30 10:51, John Larkin wrote:
On Sun, 30 Apr 2023 10:39:40 +0200, Gerhard Hoffmann <dk...@arcor.de
wrote:

Am 30.04.23 um 00:18 schrieb John Larkin:
Somebody was whining about PCB density.

I want to do a board with about 105 relays. I\'d prefer 130 but that\'s
not going to happen.

Here\'s a trial placement, just to see what might fit.

https://www.dropbox.com/s/094r7jetwjd5rft/P948_Trial_Apr_29.jpg?raw=1

We normally use the TPIC6595 shift register as our relay drivers. But
it\'s big and I\'d need 14 of them. So I think I\'ll add another Trion
FPGA and have its pins drive a logic-level SOT23 mosfet under each
relay. The T20 is only about $11, about half the cost of 14 of the TI
things.

I do need to be sure that the relays won\'t interact magnetically.

The coils will generate heat too, brickwalled like that. I think
we\'ll
use 24 volt relays and run them at 16 volts quiescently, to cut the
power dissipation about in half. We can bump the coil voltage up
to 24
for a few milliseconds, whenever we change the pattern. [1]

What about bistable relays? That will be nice to the generated
heat and will also reduce magnetic interaction when you switch
only few at a time.

We have used latching relays to select thermocouples, because they
have less thermal offsets. Relays have a lot of intermetallic
junctions inside. We had a giant capacitor bank so that when power
failed we has enough energy available to flop all the relays into
their off state. I\'d have to do that here too, with supercap at least.
Non-latching relays are cheaper and easier to get.

One of the functions of this board is a cable tester, where 25 paths
connect corresponding pins on the two D25\'s. I need each path to be
closed when power is off.



I have made a variable delay line from 3 ranks of 1:6 SMA coax
relays and a pound of SemiRigid cable. Now that runs hot!
I have provided an extra power switch for the relais so that
they can be forced OFF when currently not needed, even when
the phase noise analyzer is ON.

You can probably play pullin/hold voltage trick, like I plan to do.
Some relays and solenoids stay closed at 10% of operating voltage.

Sure, add diodes and do the relay version of charlieplexing LEDs.

Wouldn\'t that take two diodes (one dual) per relay?
I was actually teasing--I don\'t think you can usefully charlieplex relays.

Charlieplexing relies on two features of LEDs: they only conduct in one
direction, and they have this huge forward voltage, so if you have two
in series driven from a lowish voltage, nothing happens. The latter is
also true of relays if they start out inactive, but not necessarily if
they\'re already active.

Relay data sheets are universally awful. Among other things, they
seldom provide the numbers you need to exploit the pullin/dropout
differential.

Full voltage to energize and 0.7 of that, half coil power, to hold
usually works, but isn\'t generally guaranteed.


It might be fun to think about, but I doubt there\'s a genuinely useful
application.

Cheers

Phil Hobbs

The efinix FPGA costs about 5 cents per gpio and takes very little
board area.

Not competitive against ~6 cent SIPO shift registers like SN74HCS595DYYR.
You might have to push a couple of the MOSFETs to the side slightly, but
at 3.3x4.3mm footprint they should fit under your relays. (other side
of board)

The 5V capable outputs will also make more MOSFETs usable - possibly
a further saving.
Digikey stocks those for about 12 cents. Given that I had enough FPGA
pins to go full parallel, the shift register saves running 100+ traces
into the relay array, the downside being that the clock distribution
will need to be handled carefully in an already nightmarish layout.

SN74HCS595DYYR are 0ns holds so if you route the clock in the opposite direction of the data it should always work

I\'d still need avalanche-tolerant mosfets or fets plus catch diodes.
Given 3.3 volt logic from my FPGA, the shift registers would have to
run from 3.3, or something close, for level compatibility.

Thanks for the suggestion; it\'s another possibility.

74HCT at 5V is compatible with 3.3V logic


74HCT4094 does clock edge tricks to work around clock:data skew
hazards. And it could run from 5 volts and accept 3.3v inputs.

https://www.mouser.dk/ProductDetail/Nexperia/NPIC6C596APW-Q100J?qs=M%2FOdCRO8QQ1YWSXlJFSqpg%3D%3D

end-of-life, but mouser has 30K-50k in stock of many of the various versions