copper thickness test

[Tom Gardner]

On 17/01/20 19:45, John Larkin wrote:

Wodehouse was an amazing writer. A Damsel In Distress is astonishing,
especially the last three chapters.

It really is remarkable that within 120s of reading that,
it was downloaded onto my machine ready to be copied to
my kindle.

Back in the good old days it would have taken a week or
so to get it from the public library.

 

[Przemek Klosowski]

On Mon, 13 Jan 2020 06:26:08 -0800, Winfield Hill wrote:

PCB copper is thicker than predicted by the weight rating (e.g. 1 or 2
oz), for top and bottom layers,
because through-hole plating adds to its thickness.
A 2mm-wide 1cm-long trace to check for 2oz copper, measured 1.06 mR,
compared to a calculated 1.2 mR. Kelvin setup, natch, 2cm trace with
taps at 1cm.

Does this mean that the copper layer thickness in a via is just 0.3 oz
((1.2-1.06)*2)? I always thought it's strange that vias are so reliable,
especially given that they are supposed to make contact with inner layers
as well as top/bottom.

 

[legg]

On Mon, 20 Jan 2020 17:23:11 -0000 (UTC), Przemek Klosowski
<przemek@tux.dot.org> wrote:

On Mon, 13 Jan 2020 06:26:08 -0800, Winfield Hill wrote:

PCB copper is thicker than predicted by the weight rating (e.g. 1 or 2
oz), for top and bottom layers,
because through-hole plating adds to its thickness.
A 2mm-wide 1cm-long trace to check for 2oz copper, measured 1.06 mR,
compared to a calculated 1.2 mR. Kelvin setup, natch, 2cm trace with
taps at 1cm.

Does this mean that the copper layer thickness in a via is just 0.3 oz
((1.2-1.06)*2)? I always thought it's strange that vias are so reliable,
especially given that they are supposed to make contact with inner layers
as well as top/bottom.

Vias carry the copper from 'plating-up'. For 1oz that's 1/2oz stock
plated up to 1oz - so 1/2oz in the PTHs.

Vendors prefer not to have to plate up more than an ounce above the
base material, in any one operation. Buried vias may be 1/2oz
inside the prepreg, with through-holes showing extra plating from
subsequent operations, that differs with each layer, depending on
the number of plating steps it's experienced.

Vias aren't especially reliable, as a component of the board alone.
They also suffer from stress in subsequent fab steps. MTBF
calculations require via or PTH counts, though this anticipates
solderable joint issues as well.

RL

 

[Winfield Hill]

legg wrote...

Vias aren't especially reliable, as a component of the
board alone. They also suffer from stress in subsequent
fab steps. MTBF calculations require via or PTH counts,
though this anticipates solderable joint issues as well.

Should we be using double vias to get good reliability?


--
Thanks,
- Win

 

[John Larkin]

On Sat, 18 Jan 2020 01:05:07 +0000, Tom Gardner
<spamjunk@blueyonder.co.uk> wrote:

On 17/01/20 19:45, John Larkin wrote:
Wodehouse was an amazing writer. A Damsel In Distress is astonishing,
especially the last three chapters.

It really is remarkable that within 120s of reading that,
it was downloaded onto my machine ready to be copied to
my kindle.

Back in the good old days it would have taken a week or
so to get it from the public library.

Wodehouse said that he didn't so much enjoy writing, as he enjoyed
editing and tweaking it to perfection. It shows in his writing. It's
amazing how perfectly he put together a few common words.

Hope you like it. It's a silly romance that is wonderfully written.

Personally, I still like paper books.

--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

 

[John Larkin]

On 20 Jan 2020 14:07:10 -0800, Winfield Hill <winfieldhill@yahoo.com>
wrote:

legg wrote...

Vias aren't especially reliable, as a component of the
board alone. They also suffer from stress in subsequent
fab steps. MTBF calculations require via or PTH counts,
though this anticipates solderable joint issues as well.

Should we be using double vias to get good reliability?

One test case: via is specified 15 mil drill, on a 62 mil board, ENIG,
specified 1 oz copper. I see 417 uohms side to side and figure there's
an equivalent of 1.3 squares of copper in the via. That's about 320
uohms/square, or about 1.5 oz copper, if I did all that right.

We find vias to be very, maybe perfectly, reliable from a good board
house. If any one flubs a single via, we won't buy from them again.

--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

 

[piglet]

On 21/01/2020 6:47 pm, John Larkin wrote:

One test case: via is specified 15 mil drill, on a 62 mil board, ENIG,
specified 1 oz copper. I see 417 uohms side to side and figure there's
an equivalent of 1.3 squares of copper in the via. That's about 320
uohms/square, or about 1.5 oz copper, if I did all that right.

That is lower than I first expected but agrees well with Saturn PCB
Toolkit which predicts 430uohm for a 2mil plating thickness.

piglet

 

[Cursitor Doom]

On Tue, 21 Jan 2020 10:11:34 -0800, John Larkin
<jlarkin@highland_atwork_technology.com> wrote:

>Hope you like it. It's a silly romance that is wonderfully written.

Most stuff from that era was superbly crafted. 'The Go-Between' in
particular springs to mind in this regard.

>Personally, I still like paper books.

Same here. I'll probably never, *ever* buy a Kindle.

--

No deal? No problem! :-D

 

[RBlack]

On 20 Jan 2020 14:07:10 -0800, Winfield Hill <winfieldhill@yahoo.com>
said:

legg wrote...

Vias aren't especially reliable, as a component of the
board alone. They also suffer from stress in subsequent
fab steps. MTBF calculations require via or PTH counts,
though this anticipates solderable joint issues as well.

Should we be using double vias to get good reliability?

I have heard people argue that one from time to time. But IME it
doesn't work, a good PCB fab will deliver 100% reliable vias. A bad one
typically suffers from 'popcorning', where air voids in the laminate
blow the layers apart when the board goes through the reflow oven.

If the void is near a surface layer, if you're lucky you can see a
bubble. Any vias in the area will be permanently or intermittently O/C,
the intermittent ones were a nightmare.

If the PCB vendor can't or won't address this issue, fire them.

Because the affected area is typically the size of a penny, mutliple
closely-spaced vias for the same net won't help. The only reason I use
multiple vias is to reduce inductance or thermal resistance.

 

[Tom Gardner]

On 22/01/20 00:52, Cursitor Doom wrote:

On Tue, 21 Jan 2020 10:11:34 -0800, John Larkin
Personally, I still like paper books.

Same here. I'll probably never, *ever* buy a Kindle.

My use-case for a Kindle is only for those occasions
when a book is insufficient.

I leave it in my daypack in case I get trapped somewhere
for too long with nothing to read.

I use it for classic books that I might like to read but
am not prepared to buy and keep around the house "just
in case".

I have never paid for anything that's on the kindle.
Project Gutenberg is a wonderful resource.

 

[legg]

On 20 Jan 2020 14:07:10 -0800, Winfield Hill <winfieldhill@yahoo.com>
wrote:

legg wrote...

Vias aren't especially reliable, as a component of the
board alone. They also suffer from stress in subsequent
fab steps. MTBF calculations require via or PTH counts,
though this anticipates solderable joint issues as well.

Should we be using double vias to get good reliability?

For signal contact there's no issue; to carry current you'd
have to run the numbers.

RL