S
Salah Kortli
Guest
Hello world
I just use a low frequency sinusoidal signals, the frequency range of alternative reports will be about 2 Hz. I want to clock the FPGA to manage the reports.
I think I need to reduce or divide the frequency of the clock signals to 2 Hz to 1MHz. Then comes the use of Digital / Analog converter DAC.
Is it possible to go down to values mHz. Will he links, tutorials, etc ... that guides me to it.
cordially
I just use a low frequency sinusoidal signals, the frequency range of alternative reports will be about 2 Hz. I want to clock the FPGA to manage the reports.
I think I need to reduce or divide the frequency of the clock signals to 2 Hz to 1MHz. Then comes the use of Digital / Analog converter DAC.
Is it possible to go down to values mHz. Will he links, tutorials, etc ... that guides me to it.
cordially