W
Winfield Hill
Guest
bitrex wrote...
Yes, it's an excellent approach.
--
Thanks,
- Win
Yes, it's an excellent approach.
--
Thanks,
- Win
K
Klaus Kragelund
Guest
Single inductor progressive wound for 500W PFC is standard
B
bitrex
Guest
On 7/28/19 7:41 PM, Klaus Kragelund wrote:
Oh, I read down looks like OP wants his design to not use electrolytic
capacitors. That clears things up a bit. and also, damn son.
Oh, I read down looks like OP wants his design to not use electrolytic
capacitors. That clears things up a bit. and also, damn son.
B
bitrex
Guest
On 7/28/19 7:41 PM, Klaus Kragelund wrote:
Right, I've seen single coils used in PC power supplies, at least, up to
750 watts I think so it's a bit puzzling as to why need to do something
much different, unless there are very rigid full-load efficiency
requirements we don't know about. what does "low loss" mean. 80-85%
efficiency is probably standard for a good-quality 500 watt PC PSU.
Right, I've seen single coils used in PC power supplies, at least, up to
750 watts I think so it's a bit puzzling as to why need to do something
much different, unless there are very rigid full-load efficiency
requirements we don't know about. what does "low loss" mean. 80-85%
efficiency is probably standard for a good-quality 500 watt PC PSU.
W
Winfield Hill
Guest
bitrex wrote...
He found an awesome Vishay 50uF 900V film cap.
500W at 600V is 0.83A, drawing the 50uF down
by 0.1 volt in 6us. And with its 4-m-ohm esr,
the switched-current ripple is only 33mV, who
needs an electrolytic?
a bit. and also, damn son.
--
Thanks,
- Win
He found an awesome Vishay 50uF 900V film cap.
500W at 600V is 0.83A, drawing the 50uF down
by 0.1 volt in 6us. And with its 4-m-ohm esr,
the switched-current ripple is only 33mV, who
needs an electrolytic?
a bit. and also, damn son.
--
Thanks,
- Win
H
Harry D
Guest
On Sunday, July 28, 2019 at 7:00:41 AM UTC-7, Piotr Wyderski wrote:
H
Harry D
Guest
On Sunday, July 28, 2019 at 7:00:41 AM UTC-7, Piotr Wyderski wrote:
Hi Piotr, Normally CCM
On Sunday, July 28, 2019 at 7:00:41 AM UTC-7, Piotr Wyderski wrote:
Hi Piotr, Normally CCM
On Sunday, July 28, 2019 at 7:00:41 AM UTC-7, Piotr Wyderski wrote:
H
Harry D
Guest
On Sunday, July 28, 2019 at 8:39:42 AM UTC-7, Piotr Wyderski wrote:
Math is oK when used with SPICE and Breadboarding. If you need high efficiency, then you need many loops of the three magic steps. (MSB) This will reduce the L to about 300uF. At 150KHz your Kool-Mu will be hot-Mu and MPP will be better but any good Ferrite (3F3) tops all. As the power goes up and F goes down, you can drop back to Kool-Mu, (2 stacked donuts.) is a good choice, and save money. 150KHz may be difficult for MOSFETs and magnetics. SiC MOSFETs may be needed but the diode must always be SiC.
The inductor construction is tricky, gap the center post and outside walls equally. Do not go to three layers!
JL, there are some operating points that Kool-Mu cannot touch MPP.
Cheers, Harry D.
Math is oK when used with SPICE and Breadboarding. If you need high efficiency, then you need many loops of the three magic steps. (MSB) This will reduce the L to about 300uF. At 150KHz your Kool-Mu will be hot-Mu and MPP will be better but any good Ferrite (3F3) tops all. As the power goes up and F goes down, you can drop back to Kool-Mu, (2 stacked donuts.) is a good choice, and save money. 150KHz may be difficult for MOSFETs and magnetics. SiC MOSFETs may be needed but the diode must always be SiC.
The inductor construction is tricky, gap the center post and outside walls equally. Do not go to three layers!
JL, there are some operating points that Kool-Mu cannot touch MPP.
Cheers, Harry D.
J
John Larkin
Guest
On 28 Jul 2019 18:18:29 -0700, Winfield Hill <winfieldhill@yahoo.com>
wrote:
Doesn't a PFC booster need milliseconds of holdup, as the AC line
crosses zero?
If it's driving a downstream forward converter or something, a lot of
ripple might be tolerable. But not too much.
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
wrote:
Doesn't a PFC booster need milliseconds of holdup, as the AC line
crosses zero?
If it's driving a downstream forward converter or something, a lot of
ripple might be tolerable. But not too much.
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
J
John Larkin
Guest
On Sun, 28 Jul 2019 18:09:56 -0700 (PDT), Harry D <td2k99@gmail.com>
wrote:
Sure, but mpp is expensive.
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
wrote:
Sure, but mpp is expensive.
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
P
Piotr Wyderski
Guest
John Larkin wrote:
Holdup is for the situation when the AC stays zero for a predefined
time. Typically one line cycle in the case of servers, to allow them to
save critical data (which doesn't happen, anyway...). In this case this
application t_holdup=0, as there will be a battery switchover. The
capacitor is only to provide a reasonable ripple value. I have assumed
deltaV of 60V, which is just 10% of the 600V V_BUS. The downstream LLC
will have no problems with that.
Best regards, Piotr
Holdup is for the situation when the AC stays zero for a predefined
time. Typically one line cycle in the case of servers, to allow them to
save critical data (which doesn't happen, anyway...). In this case this
application t_holdup=0, as there will be a battery switchover. The
capacitor is only to provide a reasonable ripple value. I have assumed
deltaV of 60V, which is just 10% of the 600V V_BUS. The downstream LLC
will have no problems with that.
Best regards, Piotr
P
Piotr Wyderski
Guest
bitrex wrote:
Just the losses. It is easy to wind the inductor if you don't care much
about them.
There are, and this could be inferred from the thermal requirements.
And you are right, the peak efficiency is expected at the full load
and high line, not in the usual middle of the curve. For exactly the
same reason.
The goal here is 95% end-to-end, including the LLC stage. This makes
things quite interesting.
Best regards, Piotr
Just the losses. It is easy to wind the inductor if you don't care much
about them.
There are, and this could be inferred from the thermal requirements.
And you are right, the peak efficiency is expected at the full load
and high line, not in the usual middle of the curve. For exactly the
same reason.
The goal here is 95% end-to-end, including the LLC stage. This makes
things quite interesting.
Best regards, Piotr
P
Piotr Wyderski
Guest
Winfield Hill wrote:
> That's a very nice choice, I like it. Thanks!
Hearing this from you is a huge reward.
In fact, the entire converter is designed around this cap.
The "I am what I am, find a way of using me" LLC transformer
is another such a place. The bottom-up approach sometimes pays off.
Best regards, Piotr
> That's a very nice choice, I like it. Thanks!
Hearing this from you is a huge reward.
In fact, the entire converter is designed around this cap.
The "I am what I am, find a way of using me" LLC transformer
is another such a place. The bottom-up approach sometimes pays off.
Best regards, Piotr
P
Piotr Wyderski
Guest
Harry D wrote:
> Hi Piotr, Normally CCM
Right, but the low-load region is not a big concern in this application.
I can live happily with DCM or frequency-clamped BCM there. Or switch
the main converter altogether, as I have a 50W auxiliary PSU there.
Best regards, Piotr
> Hi Piotr, Normally CCM
Right, but the low-load region is not a big concern in this application.
I can live happily with DCM or frequency-clamped BCM there. Or switch
the main converter altogether, as I have a 50W auxiliary PSU there.
Best regards, Piotr
P
Piotr Wyderski
Guest
Harry D wrote:
> Math is oK when used with SPICE and Breadboarding. If you need high efficiency, then you need many loops of the three magic steps. (MSB) This will reduce the L to about 300uF. At 150KHz your Kool-Mu will be hot-Mu
This is for CCM with deltaB=30mT or so. The manufacturer's design tool
as well as the Steinmetz coefficients for the material bolted into a
Matlab script consistently report core losses of about 1W. Winding
losses are higher, but even that bumps the temperature up by at most
35 degrees for the worst design option. It is estimated to be 25.6 deg
in the case I am interested in (Core_loss=1.07W, Winding=2.23W,
deltaB=25.3mT). Not much to save already, a lot to spoil winding it
improperly.
> and MPP will be better
It is extremely stable, but its saturation properties are disappointing.
> but any good Ferrite (3F3) tops all.
Good ferrite is 3C95, used elsewhere in the converter. The main
transformer is (present tense, as it has been prototyped) wound on
an E43 planar core for its tremendous area to volume ratio. And the
40uH resonant inductor is also magnetically integrated within
the structure. Beauty, I'll show it to you later.
> you can drop back to Kool-Mu, (2 stacked donuts.)
This is also an option worth considering, thanks Bitrex, BTW.
> 150KHz may be difficult for MOSFETs and magnetics. SiC MOSFETs may be needed but the diode must always be SiC.
This is going to be an all-SiC design, based on 6xC3M0065090J. And there
will be no diode, I have always been a big fan of synchronous
rectification. SiC would be required in the totem-pole topology anyway,
so there are many reasons to go that way.
> Do not go to three layers!
Yes, this is my biggest concern.
Best regards, Piotr
> Math is oK when used with SPICE and Breadboarding. If you need high efficiency, then you need many loops of the three magic steps. (MSB) This will reduce the L to about 300uF. At 150KHz your Kool-Mu will be hot-Mu
This is for CCM with deltaB=30mT or so. The manufacturer's design tool
as well as the Steinmetz coefficients for the material bolted into a
Matlab script consistently report core losses of about 1W. Winding
losses are higher, but even that bumps the temperature up by at most
35 degrees for the worst design option. It is estimated to be 25.6 deg
in the case I am interested in (Core_loss=1.07W, Winding=2.23W,
deltaB=25.3mT). Not much to save already, a lot to spoil winding it
improperly.
> and MPP will be better
It is extremely stable, but its saturation properties are disappointing.
> but any good Ferrite (3F3) tops all.
Good ferrite is 3C95, used elsewhere in the converter. The main
transformer is (present tense, as it has been prototyped) wound on
an E43 planar core for its tremendous area to volume ratio. And the
40uH resonant inductor is also magnetically integrated within
the structure. Beauty, I'll show it to you later.
> you can drop back to Kool-Mu, (2 stacked donuts.)
This is also an option worth considering, thanks Bitrex, BTW.
> 150KHz may be difficult for MOSFETs and magnetics. SiC MOSFETs may be needed but the diode must always be SiC.
This is going to be an all-SiC design, based on 6xC3M0065090J. And there
will be no diode, I have always been a big fan of synchronous
rectification. SiC would be required in the totem-pole topology anyway,
so there are many reasons to go that way.
> Do not go to three layers!
Yes, this is my biggest concern.
Best regards, Piotr
W
Winfield Hill
Guest
Piotr Wyderski wrote...
Is that the one you designed with an intrinsic
series-resonating inductor?
> The bottom-up approach sometimes pays off.
Its sometimes a bit embarrassing to admit it, but
often finding an available capable component can
be the foundation of a push-the-limits design.
--
Thanks,
- Win
Is that the one you designed with an intrinsic
series-resonating inductor?
> The bottom-up approach sometimes pays off.
Its sometimes a bit embarrassing to admit it, but
often finding an available capable component can
be the foundation of a push-the-limits design.
--
Thanks,
- Win
J
John Larkin
Guest
On Mon, 29 Jul 2019 08:47:14 +0200, Piotr Wyderski
<peter.pan@neverland.mil> wrote:
I guess there is a concern for the heat getting out of inner windings.
The path through the copper is long.
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
<peter.pan@neverland.mil> wrote:
I guess there is a concern for the heat getting out of inner windings.
The path through the copper is long.
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
J
John Larkin
Guest
On Mon, 29 Jul 2019 08:05:44 +0200, Piotr Wyderski
<peter.pan@neverland.mil> wrote:
The AC line around here crosses zero 120 times a second! That's what I
was referring to.
60v p-p ripple sounds about right. If there's a downstream switcher,
its input impedance will be negative so the ripple is exponential in
the downward direction.
"Things don't go to hell in a straight line."
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
<peter.pan@neverland.mil> wrote:
The AC line around here crosses zero 120 times a second! That's what I
was referring to.
60v p-p ripple sounds about right. If there's a downstream switcher,
its input impedance will be negative so the ripple is exponential in
the downward direction.
"Things don't go to hell in a straight line."
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
K
Klaus Kragelund
Guest
PFC stage efficiency around 99% is standard:
https://www.infineon.com/dgdl/Infineon-Introduction_to_CoolSiC_Schottky_Diodes_650V_G6-AN-v01_00-EN.pdf?fileId=5546d4625e763904015eb8faeffd5373
Sorry for the brief post, busy days
Cheers
Klaus
https://www.infineon.com/dgdl/Infineon-Introduction_to_CoolSiC_Schottky_Diodes_650V_G6-AN-v01_00-EN.pdf?fileId=5546d4625e763904015eb8faeffd5373
Sorry for the brief post, busy days
Cheers
Klaus
W
Winfield Hill
Guest
Klaus Kragelund wrote...
Maybe you should rather say it's a standard
goal for a manufacturer showing off exceptional
performance, such as the one in the link.
But I wonder what real-world "standard" values
are for power supplies we generally encounter,
for example in a 500-watt PC power supply. This
brings up the issue that it's not easy to make
accurate measurements of AC-in DC-out losses,
especially down at the 1% level. DC-in DC-out,
yes, but PFC boost converters, no, SFAICT. The
Institute's electronics-engineering lab is well
equipped, but I currently cannot be sure of any
high crest-factor AC-power measurements, to
better than 1% to 2%.
For that matter, can we trust Infineon's data,
229.6 volts AC, 4.431 amps AC = 1014.9 watts,
e.g., to the 0.01% level, for a 98.198% result
(PFC boost converter design guide, page 20),
without any indication of how it was measured?
The very fact they give the result to 0.001% is
an indication of careless error-bar evaluation.
OK, one note mentions Yokogawa's WT330 meter,
spec: 0.1% of reading + 0.1% of range (300V),
which is 229 +/- 0.529 volts = 0.23% accuracy.
Hmm, it'd be nice to have one of those, but
we're still talking 0.25% not 0.1% certainty.
That's a 25% error at the 1% loss level.
--
Thanks,
- Win
Maybe you should rather say it's a standard
goal for a manufacturer showing off exceptional
performance, such as the one in the link.
But I wonder what real-world "standard" values
are for power supplies we generally encounter,
for example in a 500-watt PC power supply. This
brings up the issue that it's not easy to make
accurate measurements of AC-in DC-out losses,
especially down at the 1% level. DC-in DC-out,
yes, but PFC boost converters, no, SFAICT. The
Institute's electronics-engineering lab is well
equipped, but I currently cannot be sure of any
high crest-factor AC-power measurements, to
better than 1% to 2%.
For that matter, can we trust Infineon's data,
229.6 volts AC, 4.431 amps AC = 1014.9 watts,
e.g., to the 0.01% level, for a 98.198% result
(PFC boost converter design guide, page 20),
without any indication of how it was measured?
The very fact they give the result to 0.001% is
an indication of careless error-bar evaluation.
OK, one note mentions Yokogawa's WT330 meter,
spec: 0.1% of reading + 0.1% of range (300V),
which is 229 +/- 0.529 volts = 0.23% accuracy.
Hmm, it'd be nice to have one of those, but
we're still talking 0.25% not 0.1% certainty.
That's a 25% error at the 1% loss level.
--
Thanks,
- Win