Can the PIV of a diode be "safely" exceeded?

Winfield Hill wrote:

Pooh Bear wrote...

Many decades ago RCA wrote an app note relating to reliability vs thermal
cycling too. Lower temp rise results in less stress on the die attach.

Do you know which one that was?
Not offhand. Late 70s origin IIRC. I recall something about reliability being
affected by both the number of cycles and amount of delta T.


Graham
 
On Tue, 16 Nov 2004 18:00:07 -0500, KILOWATT wrote:

Yess... i normally avoid crossposting because some people see this action as
"bad" even if i perfectly agree with you, Rich.
Well, you're giving them a double-whammy by top-posting as well. :)
I've found that if you put a little note at the top, "Crossposted
to ...", and maybe a little followup reminder, that you can
get away with it - especially if it's for something that really
is on-topic in both groups.

One of the reasons I think it's better is that some people don't
read all the same groups, which is covered by posting in both,
but if it's onT, then readers of the other group can benefit from
more answers being available.

Or, if anybody gives you any guff about cross-posting, you can
say, "It's OK! Rich Grise told me to!" ;-)

Cheers!
Rich

KILOWATT, please cross-post instead of multi-posting this sort of
question, so that the answers can propagate to both groups for
the benefit of more people.

You'll note that I've crossposted this one.

If a thread becomes more group-specific, there are more than enough
people around USENET who will be more than happy to kindly remind you
to set your followups appropriately. ;-)

Thanks,
Rich
 
On Wed, 17 Nov 2004 15:18:02 +1300, Terry Given wrote:
Rich Grise wrote:
....
With a proper heat sink, or if the pulse doesn't last very
long, they can pass a surprising amount of current and live
to tell about it. ;-)

A better way to look at it is the total energy Elost dumped into the
device, in Joules.
Terry, thanks for picking up the ball here! :)
Rich
[etc.]
Then if you know the die area, thickness and material
you can calculate volume and mass, then look up specific heat capacity
cp (J/kg/K). Adiabatic temperature rise = Elost/(m*cp). Voila. You can
also make a fair estimate at the thermal resistance, and calculate the
thermal time constant:

Tau = (m*cp)*Rtheta = [J/K]*[K/W] = [W*s/K]*[K/W] =

if the pulse is less than Tau then the adiabatic approximation is good -
the die absorbs pretty much all the heat. If the pulse is longer than
Tau, then some (or perhaps almost all) of the heat flows out via the
surface and the end-caps.

I read a fascinating paper a few years back on electronic one-shots -
literally! They were electronically fired single-shot guns. I forget
exactly how the circuit worked, but basically they turned a switch on
and dumped all of the energy from a cap into a short section of pcb
track sitting below a projectile. All the energy dumps into the track,
and gets converted into heat and projectile motion. They used a 1N4007
in series with a FET as the switch. IIRC the fet leakage current was
controlled/chosen to hold the 1N4007 on the cusp of avalanche breakdown,
but keep dissipation low. To fire the device, the FET was turned hard
on, and the 1N4007 broke down. The large amount of energy involved
created a ball of plasma which swept thru the diode, turning it into a
very effective short. I must dig that back out.....

Cheers
Terry
 
In article <41A16E7E.175FA624@hotmail.com>,
Pooh Bear <rabbitsfriendsandrelations@hotmail.com> wrote:

Not offhand. Late 70s origin IIRC. I recall something about
reliability being affected by both the number of cycles and
amount of delta T.
The 1981 RCA Power Devices data book does list three
application notes that might be relevant.

AN-4612 "Thermal-Cycling rating System for Silicon
Power Transistors."

AN-4783 "Thermal-Cycling Ratings of Power Transistors."

AN-6163 "Quantative Measurements of Thermal-Cycling
Capability of Silicon Power Transistors."

Below is the descriptive text of AN-4612.

"The basic causes of thermal fatigue in silicon power
transistor are analysed, and a rating chart that makes
it possible for a circuit designer to avoid such
failures during the operating life of the equipment is
described. Examples are provided on the use of this
chart to determine the transistor operating conditions
required to assure a desired thermal-cycling capability
and to determine whether the thermal-cycling capability
is adequate for the requirements of a given application."

--
Tony Williams.
 
Terry Given wrote...
Winfield Hill wrote:

Actually silicon junctions continue to work at well far above 200C.
The 150, 175 or 200C temperature given as an operating limit is more
a package limit for reliable repeated and longterm use. A 5V1 zener
will "merely" have a different breakdown voltage at 200C -- about 6V
plus a resistive drop, which would be considerable in your scenario
(see the curves in AoE page 332).

"merely" - LOL :)

200C is a number I have used in the past, plucked from waffly stories
that make the blatant assertion "silicon goes intrinsic at around 200C"
without providing supporting proof. I once tried to find some hard data
on this, but to no avail. Many years ago I read Dye and Granberg's book
on RF transistors, and discovered that Tjmax = 125C is a kinda arbitrary
thing (apparently RF Si-abusers beat their silicon much harder, 175C not
being uncommon) but as you say, reliability/lifetime goes down - high dT
exacerbates TCE mismatch related thermal fatigue, (IIRC metal migration
speeds up too).
Right, I think, although I'm not an expert on these things. But I do
know that many TO-3 power transistors are rated at Tj <= 175C, while
the same die is derated to 150C in a plastic package. And if the die
has linear IC functionality, it may be rated at Tj <= 125C.

There are several companies selling 200C rated power transistors, and
some with 250C rated junctions. For example ST's AM1214-300 (pulsed)
and others in that microwave series, ASI's ADV150 power RF series, and
Microsemi's 2208 series. These are BJT types with emitter ballasting.

So: What number should I use?
What you do for conservative design is to keep the transient junction
temperature below the rated maximum, preferably by 25C or more. :>)

[I have done these calculations plus transient thermal modeling,
combined with actual high-energy-breakdown junction-temperature
measurements on a microsecond timescale. My in-situ dynamic
junction-temperature measurements were made several ways. One
was by interrupting the high current and placing the diode into
low-current breakdown and using the voltage tempco to self-measure
the junction temperature. These measurements matched my modeling.

I also did a 10,000-cycle test with rapid (100us) jumps to 250C,
and saw no damage, nor any observable spec change to the part!

Wow! Now thats what I call characterising your semiconductors.
I should emphasize that the design for which I was doing these tests
(should I say for which I justified my exploration into this scene?)
did not take the semiconductor junctions above their rated 175C.
I just wanted to see how much safety margin the design really had.

Someday I'd like to return to the issue and find out just where one
does get into trouble. My understanding from the work of others is
that this varies from component type to type, and from manufacturer
to manufacturer - some are VERY good, and some are not.]

That is a good question. I have a job coming up where I will be making
a 3-phase ZCS converter using an auxiliary commutation network. It gets
a 0.5us pulse every 50us, so knowing the peak "acceptable" (whatever
that means) Tj will allow me to minimise the Si cost. Luckily the
manufacturers provide no data whatsoever in this regard.
Well, most do provide detailed Transient Thermal Impedance curves and
data so you can calculate what your Tj excursions will be from 1%-duty
50us-period pulsing. You can also do what I did, saw the part in half,
make a modest FEA compartmentalized thermal model, and test the model
by the schemes I mentioned, to further validate calculations in the
0.5us to 50us region. If you have the time. :>)

My background is big motor drives, and thermal cycling is perhaps the
major determining factor in IGBT lifetime (assuming the design actually
works, not always a valid assumption) - the mechanical forces caused by
mismatched TCE cause voids to form in the die-to-DCB-substrate solder
joint, increasing Rtheta and hence dTj. But these are BIG junctions -
1cm x 1cm is not uncommon (rough dimensions only), so the forces
involved are quite significant. There have been a couple of lovely
papers in IEEE trans. industry apps, showing (IIRC) xrays of the voids
forming. hockey-puck thyristors et al are immune to this type of
failure, as they aint soldered!
Ouch. But I agree, that Industry Applications journal is a real gas.

Yee-ha - I've been up for 30 minutes, and have already learned something
useful. Thanks Win. Todays shaping up to be a great day. Oh wait, thats
right, I have to mow the lawns - a 3 hour job. doh. Still, I'm now a
slightly smarter labourer :)
Sounds serious.

Dunno, pick some parts, and start some extended duration life-cycle
stress-testing programs. Ahem, after you mow the lawns that is...


--
Thanks,
- Win
 
Pooh Bear wrote:
Terry Given wrote:


200C is a number I have used in the past, plucked from waffly stories
that make the blatant assertion "silicon goes intrinsic at around 200C"
without providing supporting proof. I once tried to find some hard data
on this, but to no avail. Many years ago I read Dye and Granberg's book
on RF transistors, and discovered that Tjmax = 125C is a kinda arbitrary
thing (apparently RF Si-abusers beat their silicon much harder, 175C not
being uncommon) but as you say, reliability/lifetime goes down - high dT
exacerbates TCE mismatch related thermal fatigue, (IIRC metal migration
speeds up too).


Interesting to note that packaging influences Tj max.

On Semi make a couple of devices ( typicaaly used in high power audio output
stages ) that are available in TO-3 or TO-3P. MJ(L)21193/4

The TO-3 version is rated for Tj = 200C but the plastic packaged part is just
150C.

Clearly if the device is specced to operate OK at 200C - intrinsic conduction
must occur at a somewhat higher temp.


Many decades ago RCA wrote an app note relating to reliability vs thermal
cycling too. Lower temp rise results in less stress on the die attach.


Graham

Hi Graham,

I mentioned in another post recently that powerex app notes actually
have a dTj-vs-lifetime curve.

Cheers
Terry
 
Winfield Hill wrote:

Terry Given wrote...

Winfield Hill wrote:

Actually silicon junctions continue to work at well far above 200C.
The 150, 175 or 200C temperature given as an operating limit is more
a package limit for reliable repeated and longterm use. A 5V1 zener
will "merely" have a different breakdown voltage at 200C -- about 6V
plus a resistive drop, which would be considerable in your scenario
(see the curves in AoE page 332).

"merely" - LOL :)

200C is a number I have used in the past, plucked from waffly stories
that make the blatant assertion "silicon goes intrinsic at around 200C"
without providing supporting proof. I once tried to find some hard data
on this, but to no avail. Many years ago I read Dye and Granberg's book
on RF transistors, and discovered that Tjmax = 125C is a kinda arbitrary
thing (apparently RF Si-abusers beat their silicon much harder, 175C not
being uncommon) but as you say, reliability/lifetime goes down - high dT
exacerbates TCE mismatch related thermal fatigue, (IIRC metal migration
speeds up too).


Right, I think, although I'm not an expert on these things. But I do
know that many TO-3 power transistors are rated at Tj <= 175C, while
the same die is derated to 150C in a plastic package. And if the die
has linear IC functionality, it may be rated at Tj <= 125C.

There are several companies selling 200C rated power transistors, and
some with 250C rated junctions. For example ST's AM1214-300 (pulsed)
and others in that microwave series, ASI's ADV150 power RF series, and
Microsemi's 2208 series. These are BJT types with emitter ballasting.


So: What number should I use?


What you do for conservative design is to keep the transient junction
temperature below the rated maximum, preferably by 25C or more. :>)
oops, poorly phrased question. What temperature should I pick for a
will-fry-the-device. perhaps 500C.

Great advice though.

does remind me of a mag-amp described in one of my books that runs at
500C. A jolly good trick, and not so easy to do with opamps :)

[I have done these calculations plus transient thermal modeling,
combined with actual high-energy-breakdown junction-temperature
measurements on a microsecond timescale. My in-situ dynamic
junction-temperature measurements were made several ways. One
was by interrupting the high current and placing the diode into
low-current breakdown and using the voltage tempco to self-measure
the junction temperature. These measurements matched my modeling.

I also did a 10,000-cycle test with rapid (100us) jumps to 250C,
and saw no damage, nor any observable spec change to the part!

Wow! Now thats what I call characterising your semiconductors.


I should emphasize that the design for which I was doing these tests
(should I say for which I justified my exploration into this scene?)
did not take the semiconductor junctions above their rated 175C.
I just wanted to see how much safety margin the design really had.


Someday I'd like to return to the issue and find out just where one
does get into trouble. My understanding from the work of others is
that this varies from component type to type, and from manufacturer
to manufacturer - some are VERY good, and some are not.]

That is a good question. I have a job coming up where I will be making
a 3-phase ZCS converter using an auxiliary commutation network. It gets
a 0.5us pulse every 50us, so knowing the peak "acceptable" (whatever
that means) Tj will allow me to minimise the Si cost. Luckily the
manufacturers provide no data whatsoever in this regard.


Well, most do provide detailed Transient Thermal Impedance curves and
data so you can calculate what your Tj excursions will be from 1%-duty
50us-period pulsing. You can also do what I did, saw the part in half,
make a modest FEA compartmentalized thermal model, and test the model
by the schemes I mentioned, to further validate calculations in the
0.5us to 50us region. If you have the time. :>)
My plan is to lean on them for a detailed thermal model (I know they
have one) and then spice it. If that fails, you're right - its out with
the hacksaw and pencil. Luckily the baseplate is thick enough that I
need to take spreading into account. And my stack of IEEE IA mags has
the answer buried in there somewhere. Maybe I should do an IEA using a
fish tank, copper sheet and some salt water - a 3D version of teledeltos
paper if you will ;) Hey, hang on a minute, I'm not old enough to know
about space paper. I blame bob pease.

My background is big motor drives, and thermal cycling is perhaps the
major determining factor in IGBT lifetime (assuming the design actually
works, not always a valid assumption) - the mechanical forces caused by
mismatched TCE cause voids to form in the die-to-DCB-substrate solder
joint, increasing Rtheta and hence dTj. But these are BIG junctions -
1cm x 1cm is not uncommon (rough dimensions only), so the forces
involved are quite significant. There have been a couple of lovely
papers in IEEE trans. industry apps, showing (IIRC) xrays of the voids
forming. hockey-puck thyristors et al are immune to this type of
failure, as they aint soldered!


Ouch. But I agree, that Industry Applications journal is a real gas.


Yee-ha - I've been up for 30 minutes, and have already learned something
useful. Thanks Win. Todays shaping up to be a great day. Oh wait, thats
right, I have to mow the lawns - a 3 hour job. doh. Still, I'm now a
slightly smarter labourer :)


Sounds serious.

Dunno, pick some parts, and start some extended duration life-cycle
stress-testing programs. Ahem, after you mow the lawns that is...
Thanks for reminding me :(

Cheers
Terry
 
On Sat, 20 Nov 2004 19:36:16 -0800, Winfield Hill wrote:

Rich Grise wrote...

I also had at least one tech school teacher who said that in some cases an
ordinary rectifier is put in series with a zener and so their tempcos, if
not exactly cancel out, at least mostly do. Which makes sense, and I kind
of wonder if there are a lot of them already being made like that - the
die could be just an ordinary transistor, calibrated. ;-)

Yep, but only at a specific voltage. Look at the zener tempco curve
in AoE page 333, and note the +2.2mV/C tempco for a 5.8V zener running
at 10mA. Put a -2.2mV/C tempco in series with that (a diode-connected
transistor) and now you've got a zero-tempco 6.4V reference. Curves on
page 332 show it'll have a comparatively-low dynamic impedance as well.
Well, yeah, but what's the problem there? Notwithstanding I haven't heard
of a 5.8V zener diode, but 5.6V is as common as a 5K6 resistor, and the
next value would be 6.2V, also common - I guess my question goes to, how
do they control the breakdown of the main junction anyway? Something to
do with how/how much they diffuse the dopants in, I'm guessing - or how
long they leave the ion beam going - or is epitaxial out of style these
days?

Thanks,
Rich
(And apologies for having never even _seen_ your book, let alone read it -
but I promise I will read it if I ever get my hands on one!)
 
Tony Williams wrote:

In article <41A16E7E.175FA624@hotmail.com>,
Pooh Bear <rabbitsfriendsandrelations@hotmail.com> wrote:

Not offhand. Late 70s origin IIRC. I recall something about
reliability being affected by both the number of cycles and
amount of delta T.

The 1981 RCA Power Devices data book does list three
application notes that might be relevant.

AN-4612 "Thermal-Cycling rating System for Silicon
Power Transistors."

AN-4783 "Thermal-Cycling Ratings of Power Transistors."

AN-6163 "Quantative Measurements of Thermal-Cycling
Capability of Silicon Power Transistors."

Below is the descriptive text of AN-4612.

"The basic causes of thermal fatigue in silicon power
transistor are analysed, and a rating chart that makes
it possible for a circuit designer to avoid such
failures during the operating life of the equipment is
described. Examples are provided on the use of this
chart to determine the transistor operating conditions
required to assure a desired thermal-cycling capability
and to determine whether the thermal-cycling capability
is adequate for the requirements of a given application."
Thanks for that Tony.

I wonder if modern die bonding has improved such as to reduce the impact
of this effect.


Graham
 
In article <41A55D7F.7EB2FD07@hotmail.com>,
Pooh Bear <rabbitsfriendsandrelations@hotmail.com> wrote:

Tony Williams wrote:
The 1981 RCA Power Devices data book does list three
application notes that might be relevant.
[snip]

Thanks for that Tony.

I wonder if modern die bonding has improved such as to reduce the
impact of this effect.
Some of the TO-3 power transistor data sheets in that old
RCA book did have charts predicting the count of thermal
cycles against peak power and the change in case temperature,
but I do not remember seeing such charts from any other
manufacturer since.

--
Tony Williams.
 

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