S
Skybuck Flying
Guest
Hi,
Some time ago I already had this idea of inserting counters into if
statements to predict which branch is most likely to be executed. At the
lower levels this would mean inserting counters into jump instructions and
recording which branch is executed the most by incrementing or maybe even
decrementing counters everytime the branch gets executed.
Then the execute-ahead logic would execute those branches with the highest
counter. Also a execute-ahead flag could be inserted into the jump
instruction to indicate if execute-ahead is allowed. For example a compiler
can use this flag to indicate that execute-ahead is not possible etc.
Ofcourse branch prediction is nothing new and processors nowadays have that.
So I was browsing through some patents. (Not all because that would take way
too much time... It would maybe take a day maybe even a few days to browse
through them all )
So far I have seen one patent which mentions using a "taken/not taken" bit
which indicates if a branch was taken or not.
So I have few questions about branch prediction.
1. Is it common to use counters as described above to do branch prediction
or is this something novel ?
2. Suppose it's not novel... then why only use 1 bit to do branch prediction
?
Some reasons which I can think of:
1. It requires less memory than bigger counters.
2. Counters might take to long to change. For example Branch A might be
executed many times, then suddenly Branch B has to be executed many times.
Using large counters might take to long for the prediction to catch up
What are your thoughs on this ?
Any references to patents or other information about branch prediction ?
Bye,
Skybuck.
Some time ago I already had this idea of inserting counters into if
statements to predict which branch is most likely to be executed. At the
lower levels this would mean inserting counters into jump instructions and
recording which branch is executed the most by incrementing or maybe even
decrementing counters everytime the branch gets executed.
Then the execute-ahead logic would execute those branches with the highest
counter. Also a execute-ahead flag could be inserted into the jump
instruction to indicate if execute-ahead is allowed. For example a compiler
can use this flag to indicate that execute-ahead is not possible etc.
Ofcourse branch prediction is nothing new and processors nowadays have that.
So I was browsing through some patents. (Not all because that would take way
too much time... It would maybe take a day maybe even a few days to browse
through them all )
So far I have seen one patent which mentions using a "taken/not taken" bit
which indicates if a branch was taken or not.
So I have few questions about branch prediction.
1. Is it common to use counters as described above to do branch prediction
or is this something novel ?
2. Suppose it's not novel... then why only use 1 bit to do branch prediction
?
Some reasons which I can think of:
1. It requires less memory than bigger counters.
2. Counters might take to long to change. For example Branch A might be
executed many times, then suddenly Branch B has to be executed many times.
Using large counters might take to long for the prediction to catch up
What are your thoughs on this ?
Any references to patents or other information about branch prediction ?
Bye,
Skybuck.