ASCII Circuits

[Jonathan Kirwan]

On Fri, 10 Sep 2004 08:31:07 +0100, Terry Pinnell
<terrypinDELETE@THESEdial.pipex.com> wrote:

Jonathan Kirwan <jkirwan@easystreet.com> wrote:

snip

By the way, I just took two hours to write a short C routine to convert LTSpice
schematics in .ASC files into ASCII text schematics. Works kind of well, for
such short effort. Here's an example I just extracted using the new program:


Vcc
| Vcc
| |
| Vcc |
- | |
--- V1 | /
- | \ R2
--- / /
| \ R3 \
| / |
gnd \ |
| +-----Vc
| |
C1 || | |
,-------||---|-------------, |
| || | | /
| | R6 | |/c
| +-----/\/\----+---|
/-\ | |>e
~ V2 | \
\-/ | |
| | C3 || +-------,
| +-----------||-------+ |
| | || | |
| / / /
gnd \ R4 \ R1 \ R5
/ / /
\ \ \
| | |
| | |
| | |
gnd gnd |
---
---
| C2
|
|
|
gnd

snip

Needs more work, but it's a start to prove that the concept is workable.

Well done! Hope you'll pursue to completion and publication!

Hehe. Well, keep in mind that it's a DOS based command line program, accepting
a file name and just dumping to 'stdout.' But I'll put something out there as
soon as I think it's sufficiently useful in a general way and the code, too,
once I get it organized a little better so that others have a chance with it. I
compiled it with VC 1.52C. It's surprisingly short C code, though. Just a few
hundred lines.

Meanwhile, could you post the SWCADIII schematic original, or a bitmap
screenshot please?

The original .ASC follows. It was NOT designed for any kind of demonstration
here, so it has .param and the like on it. But I'll include the file for
examination. In the above diagram, I still hadn't gotten around to adding Q1's
stuff (BJTs), so that's missing there. But I've got another version adding
that, now.

Anyway, here's the file:

Version 4
SHEET 1 1792 828
WIRE 672 480 672 512
WIRE 672 400 672 384
WIRE 144 80 144 48
WIRE 128 384 128 416
WIRE 128 256 128 304
WIRE 144 176 144 160
WIRE 672 176 672 208
WIRE 672 96 672 64
WIRE 336 400 336 384
WIRE 336 208 336 304
WIRE 336 480 336 512
WIRE 336 96 336 128
WIRE 672 208 752 208
WIRE 672 208 672 256
WIRE 240 256 128 256
WIRE 800 480 800 512
WIRE 800 576 800 608
WIRE 672 368 800 368
WIRE 672 368 672 352
WIRE 800 368 800 400
WIRE 496 304 560 304
WIRE 416 304 336 304
WIRE 560 384 672 384
WIRE 672 384 672 368
WIRE 496 384 336 384
WIRE 336 384 336 304
WIRE 304 256 560 256
WIRE 560 256 560 304
WIRE 560 304 608 304
FLAG 144 48 Vcc
FLAG 672 64 Vcc
FLAG 128 416 0
FLAG 336 96 Vcc
FLAG 672 512 0
FLAG 336 512 0
FLAG 144 176 0
FLAG 752 208 Vc
IOPIN 752 208 Out
FLAG 800 608 0
SYMBOL npn2 608 256 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res 656 384 R0
SYMATTR InstName R1
SYMATTR Value {Ve/Iq}
SYMBOL voltage 144 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vbat}
SYMBOL voltage 128 288 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC .02 0
SYMATTR InstName V2
SYMATTR Value SINE(0 .1 5000)
SYMBOL res 656 80 R0
SYMATTR InstName R2
SYMATTR Value {Vbat/(2*Iq)}
SYMBOL res 320 112 R0
SYMATTR InstName R3
SYMATTR Value {10*Ve/Iq}
SYMBOL res 320 384 R0
SYMATTR InstName R4
SYMATTR Value {(10*Ve/Iq)/(Vbat/(Ve+Vbe)-1)}
SYMBOL cap 304 240 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 10ľ
SYMBOL res 784 384 R0
SYMATTR InstName R5
SYMATTR Value {(Ve/Iq)*((Vbat/(2*G)-Vtemp)/(Ve-Vbat/(2*G)+Vtemp))}
SYMBOL cap 784 512 R0
SYMATTR InstName C2
SYMATTR Value {(2*Iq*G)/(6.2832*f*(2*G*Vtemp+Vbat))}
SYMBOL res 512 288 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R6
SYMATTR Value 150k
SYMBOL cap 560 368 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C3
SYMATTR Value .033ľ
TEXT 1030 122 Left 0 !.tran 0 .05 0 1000n
TEXT 1032 168 Left 0 !.param Iq=200uA
TEXT 1032 200 Left 0 !.param Vbat=9V
TEXT 1032 232 Left 0 !.param G=20
TEXT 1032 264 Left 0 !.param f=100Hz
TEXT 1032 296 Left 0 !.param Ve=1V
TEXT 1032 328 Left 0 !.param Vbe=0.767V
TEXT 1032 360 Left 0 !.param Vtemp=25.3mV

 

[Terry Pinnell]

Jonathan Kirwan <jkirwan@easystreet.com> wrote:

<snip>

Hehe. Well, keep in mind that it's a DOS based command line program, accepting
a file name and just dumping to 'stdout.' But I'll put something out there as
soon as I think it's sufficiently useful in a general way and the code, too,
once I get it organized a little better so that others have a chance with it. I
compiled it with VC 1.52C. It's surprisingly short C code, though. Just a few
hundred lines.

Meanwhile, could you post the SWCADIII schematic original, or a bitmap
screenshot please?

The original .ASC follows. It was NOT designed for any kind of demonstration
here, so it has .param and the like on it. But I'll include the file for
examination. In the above diagram, I still hadn't gotten around to adding Q1's
stuff (BJTs), so that's missing there. But I've got another version adding
that, now.

Anyway, here's the file:

<snip>

Thanks. In case anyone else who wants to try playing with an ASCII
version of it doesn't have SWCADIII, here's a screenshot of how it
loads here:
http://www.terrypin.dial.pipex.com/Images/Jonathan1.gif

--
Terry Pinnell
Hobbyist, West Sussex, UK

 

[Jonathan Kirwan]

On Fri, 10 Sep 2004 19:52:25 +0100, Terry Pinnell
<terrypinDELETE@THESEdial.pipex.com> wrote:

Thanks. In case anyone else who wants to try playing with an ASCII
version of it doesn't have SWCADIII, here's a screenshot of how it
loads here:
http://www.terrypin.dial.pipex.com/Images/Jonathan1.gif

Thanks, Terry. I have created PNG files from LTSpice before, but it's a series
of somewhat unfamiliar steps for me and I appreciate your help.

I was surprised just how easy the code was to imagine and then write, by the
way. I didn't know anything about the details of the .ASC files (I have posted
a question about that in the LTSpice Yahoo group), but after looking at them I
decided it was sufficiently understandable without documentation that I could
make a first-shot attempt.

The first thing I noticed were the WIRE lines in the file and the numbers used.
I knew that LTSpice probably used an abstract drawing surface for its
positioning (anyone doing Windows coding has been there and done that) and that
these numbers probably represented these positions. Four numbers meant to me,
at a guess, start and end points in (x y) format, so I went with that. I also
assumed the numbers in positions 1 and 3 would be left-right x and that those in
position 2 and 4 would be up-down y. I assumed (0,0) would be upper-left, at
first. Then I saw some negative values. But I still retained the idea that it
was positive-down and positive-right orientation, which appears to have been
correct.

Next thing was to imagine how to translate the wiring into ASCII character
positions. It seemed obvious to try and use a GCD computation to find the GCD
for all the wiring end points and use that to then "shrink" the numbers to
adjacent positions needed in the ASCII output. This seems to have worked out
really well. The schematics I've tried have their wiring tapped on the course
grid of LTSpice, which I believe is every 16 points on the abstract plane. I
have also looked into the .ASY files, just for kicks, and found that there are
often sub-16 in their positioning. For example, on the 8's in places. If I
were to try and simulate the .ASY representations, I can easily see that this
may greatly increase the overall spread of the ASCII schematic (for example,
just going from x16 to x8 would double the width and double the height.) So, my
plan is to simply hard-code (or, perhaps, define a file format that can be
easily edited) the .ASY equivalents for *known* parts. In other words, I think
it would be better to supply new .ASY equivalents for each ASCII part. There
are only four rotations to worry about and each of these may be mirrored, for a
total of 8 images needed for each ASCII part. The common ones can be quickly
defined, leaving specialty stuff for those with an interest and inclination, I
suppose.

The wiring system works by dividing up each ASCII character into four walls
arranged like:

. T .
|
|
L ----- + ----- R
|
|
. B .

In this way, I have left side, right side, bottom side, and top side walls with
a (+) dot in the middle, which may be dotted or not. Any WIRE I draw places a
DOT at the two end-points. It also draws the L&R or T&B walls through any ASCII
cell as it draws, without DOT'ing them. The starting and ending cells get only
one or the other wall, though. In the end, this provides a maximum of 32
possible permutations, but only a little more than half of those are legal ones.
The code then just decides what to emit as ASCII for each one.

I also reserve a bit to tell me if the cell is storing a specific ASCII
character rather than all these walls/dots. In that case, it overrides. That
way, I can place text and the like. The rest was dead easy, once I'd
conceptualized this in mind.

Anyway, that's my strategy.

Jon

 

[Andreas Weber]

Robert C Monsen schrieb:

More components would be nice; a zener diode picture is the main one I
always seem to be missing. Not a big deal.

Added Zener Diode, and made some changes so the components are
now "american-style"

Another thing, it would be really nice to be able to move sections of
the schematic around; I find myself erasing and redoing sections when
I 'paint myself into a corner'. Being able to easily move parts around
with a selection cut and paste scheme would be great. The 'add/delete
lines/columns' scheme isn't as nice as the cut/paste would be.

Added a selectbox which can be moved, copied or deleted. test it.
greetings Andy

 

[Andreas Weber]

Jonathan Kirwan schrieb:

On Fri, 10 Sep 2004 00:28:32 +0200, Andreas Weber <spam@tech-chat.de> wrote:


Jonathan Kirwan schrieb:

I still wish the display area redraws could be reduced to smaller regions so
they'd not flicker things so much, but the 'editor' is handy and the magline is
better than the other line styles. Thanks for pointing them out to me!

Hi Jonathan,
I must admit, that I have still a redraw problem but I'll fix that soon.
With which action does this happen most strongly? Do you display the grid ?


No, I don't display the grid very often. I played with it, though. But what I
meant is that it's 'really bad' when I'm inserting or deleting lines or rows
with those red/green things.

did some work on the redraw procedure, should be very better now.
added move/select/delete in a selectbox

By the way, I just took two hours to write a short C routine to convert LTSpice
schematics in .ASC files into ASCII text schematics. Works kind of well, for
such short effort. Here's an example I just extracted using the new program:

you can also try the IMPORT feature in AACircuit v1.26 when released

 

[Andreas Weber]

Randy Day schrieb:

Oh, yeah, I found a couple of quirks in the symbol editor;
if I press left-parenthesis '(' the editing rectangle
shifts right and down instead of just right.
When I press '>' the editor moves to the next SET of
symbols in the list. They're not big issues, but they were a
couple of those 'WTF?' moments!

Improved the symbol editor, just take a look
Thanks for the component.ini, they look "american ISO"
MfG Andy

 

[Robert Monsen]

Andreas Weber wrote:

Robert C Monsen schrieb:

More components would be nice; a zener diode picture is the main one I
always seem to be missing. Not a big deal.


Added Zener Diode, and made some changes so the components are
now "american-style"

Another thing, it would be really nice to be able to move sections of
the schematic around; I find myself erasing and redoing sections when
I 'paint myself into a corner'. Being able to easily move parts around
with a selection cut and paste scheme would be great. The 'add/delete
lines/columns' scheme isn't as nice as the cut/paste would be.


Added a selectbox which can be moved, copied or deleted. test it.
greetings Andy

Very cool! I'll try it out today. Thanks.

Bob Monsen