A bit of help with a crystal oscillator

[Peter]

I have read a lot of stuff on this topic but find it hard to apply it.

I have a 25MHz xtal. For example Kyocera CX3225GB25000P0HPQZ1. The
spec says typ drive level 10uW, 100uW max.

The oscillator circuit is the usual Pierce one as in e.g. here

https://electronics.stackexchange.com/questions/368945/crystal-oscillator-circuit-design?rq=1

The CPU is a STM32F407VGT6.

The development kit for this CPU has the two caps for the xtal load
cap and the resistor is 220R. The xtal they use is an anonymous one,
however; old style metal can (HC49?).

The ST appnotes point one to a load of xtals which either don't exist
or are way too expensive for production

The internal feedback resistor is given as 200k which is fairly
normal.

Another appnote suggests measuring the xtal current, with a current
probe. I could construct a current probe with a little ferrite core (I
used to make these up for switching power supplies; a lot cheaper than
the Tek current probes) but these components are so tiny (0603-0805)
that the required loop would really mess things up.

The circuit runs fine, but I need to have some confidence in the
margins over temperature and component tolerances.

The load caps are 7pF, which should be about right for the 10pF load
cap of the xtal I am using, allowing for a bit of PCB capacitance (say
5pF). The above Kyocera P/N says 8pF.

OTOH I have read one appnote which says the CL calculation is
different: the cap value is to be the sum of the CPU pin stray cap and
the xtal load cap; this means the CL should be 15pF!

Probing the two ends of the xtal with a Wavesurfer 3034 with a ZS1000
probe (9pF/1Mohm) I see about 0.5V p-p one end and 0.3V p-p on the
other end.

Does this seem reasonable?

Many thanks for any comments.

 

[Tim Williams]

"Peter" <nospam@nospam9876.com> wrote in message
news:qpudmu$47b$1@dont-email.me...

The CPU is a STM32F407VGT6.

The development kit for this CPU has the two caps for the xtal load
cap and the resistor is 220R. The xtal they use is an anonymous one,
however; old style metal can (HC49?).

The ST appnotes point one to a load of xtals which either don't exist
or are way too expensive for production

Mind that ST's oscillators have relatively low transconductance, so you need
a relatively high ESR crystal to go with it. Which goes hand-in-hand with
low CL. 60R seems low, but 8pF should be reasonable, and the difference is
probably just the frequency being higher than other cases (e.g. a 4 or 12MHz
crystal is pretty common).

OTOH I have read one appnote which says the CL calculation is
different: the cap value is to be the sum of the CPU pin stray cap and
the xtal load cap; this means the CL should be 15pF!

Yes, CL is the total as seen by the crystal. So, the two loading caps in
parallel with the respective pin caps, and then the series equivalent of
both together.

Probing the two ends of the xtal with a Wavesurfer 3034 with a ZS1000
probe (9pF/1Mohm) I see about 0.5V p-p one end and 0.3V p-p on the
other end.

That sounds fine, but as you note, it's one case, not indicative of
manufacturing, temp or age spread.

Tim

--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Design
Website: https://www.seventransistorlabs.com/

 

[mpm]

On Wednesday, November 6, 2019 at 11:02:32 AM UTC-5,

Connecting a crystal and a couple of caps to an IC is a notoriously
flakey way to make a clock. Some impressive fraction of the time it
doesn't oscillate, and if it does the frequency could be anywhere.

I always understood that the issue was "guaranteed oscillator startup". The capacitors were there to make sure that happened.

And related to that is the issue of die shrink, where (over time) improvements in manufacturing processes result in smaller and smaller silicon dies (even though the IC package size doesn't change). The end result is longer internal lead wires which can change the amount of needed crystal loading. And THAT is why a lot of folks think that crystals are flaky - they are not accounting for die shrink (and honestly, how would they ever even know?)

 

On Wed, 06 Nov 2019 12:18:37 +0000, Peter <nospam@nospam9876.com>
wrote:

I have read a lot of stuff on this topic but find it hard to apply it.

I have a 25MHz xtal. For example Kyocera CX3225GB25000P0HPQZ1. The
spec says typ drive level 10uW, 100uW max.

The oscillator circuit is the usual Pierce one as in e.g. here

https://electronics.stackexchange.com/questions/368945/crystal-oscillator-circuit-design?rq=1

The CPU is a STM32F407VGT6.

The development kit for this CPU has the two caps for the xtal load
cap and the resistor is 220R. The xtal they use is an anonymous one,
however; old style metal can (HC49?).

The ST appnotes point one to a load of xtals which either don't exist
or are way too expensive for production

The internal feedback resistor is given as 200k which is fairly
normal.

Another appnote suggests measuring the xtal current, with a current
probe. I could construct a current probe with a little ferrite core (I
used to make these up for switching power supplies; a lot cheaper than
the Tek current probes) but these components are so tiny (0603-0805)
that the required loop would really mess things up.

The circuit runs fine, but I need to have some confidence in the
margins over temperature and component tolerances.

The load caps are 7pF, which should be about right for the 10pF load
cap of the xtal I am using, allowing for a bit of PCB capacitance (say
5pF). The above Kyocera P/N says 8pF.

OTOH I have read one appnote which says the CL calculation is
different: the cap value is to be the sum of the CPU pin stray cap and
the xtal load cap; this means the CL should be 15pF!

Probing the two ends of the xtal with a Wavesurfer 3034 with a ZS1000
probe (9pF/1Mohm) I see about 0.5V p-p one end and 0.3V p-p on the
other end.

9 pF is pretty intrusive.

Does this seem reasonable?

Many thanks for any comments.

Connecting a crystal and a couple of caps to an IC is a notoriously
flakey way to make a clock. Some impressive fraction of the time it
doesn't oscillate, and if it does the frequency could be anywhere.

We use the free internal clock on the ST processors; it's good enough
for most uses.

If you need a better clock, buy an XO. It will probably be trimmed to
a few PPM, and it will always oscillate, and will probably be cheaper.



--

John Larkin Highland Technology, Inc

lunatic fringe electronics

 

[Peter]

"Tim Williams" <tiwill@seventransistorlabs.com> wrote:

"Peter" <nospam@nospam9876.com> wrote in message
news:qpudmu$47b$1@dont-email.me...
The CPU is a STM32F407VGT6.

The development kit for this CPU has the two caps for the xtal load
cap and the resistor is 220R. The xtal they use is an anonymous one,
however; old style metal can (HC49?).

The ST appnotes point one to a load of xtals which either don't exist
or are way too expensive for production

Mind that ST's oscillators have relatively low transconductance, so you need
a relatively high ESR crystal to go with it. Which goes hand-in-hand with
low CL. 60R seems low, but 8pF should be reasonable, and the difference is
probably just the frequency being higher than other cases (e.g. a 4 or 12MHz
crystal is pretty common).

Many thanks.

I have two xtals

A cheap one from China (from AEL)
CL=10pF
ESR=60R
Pmax=100uW
C0=3pF

The branded Kyocera one
CL=8pF
ESR=60R
Pmax=100uW
C0=?

I think the chip pin and PCB capacitance is about 5pF, so what should
the two caps be?

If the load caps are 10pF, then both are really 15pF. Two 15pF in
series = 7.5pF so an 8pF xtal is right.

So for my "10pF" chinese one I should be used two 15pF caps. Is this
right? It seems weird.

Presumably getting this wrong doesn't change the starting conditions
for the oscillator; it just makes the frequency slightly off, a few
ppm?

OTOH I have read one appnote which says the CL calculation is
different: the cap value is to be the sum of the CPU pin stray cap and
the xtal load cap; this means the CL should be 15pF!

Yes, CL is the total as seen by the crystal. So, the two loading caps in
parallel with the respective pin caps, and then the series equivalent of
both together.


Probing the two ends of the xtal with a Wavesurfer 3034 with a ZS1000
probe (9pF/1Mohm) I see about 0.5V p-p one end and 0.3V p-p on the
other end.

That sounds fine, but as you note, it's one case, not indicative of
manufacturing, temp or age spread.

The series resistor is more tricky.

Normally with oscillators around chips I have seen a swing on the
driving pin of almost GND to VCC, and perhaps 1/3 of that on the other
side of the xtal. Most people never bother with this resistor.

But I have seen some weird things on 32768Hz oscillators. Years ago I
had a design which would mysteriously gain maybe a minute per week. I
never worked out why. The RTC was a DS11302 - perhaps the lowest power
RTC ever. I reckoned that some RF was getting in.

 

[Peter]

jlarkin@highlandsniptechnology.com wrote:

We use the free internal clock on the ST processors; it's good enough
for most uses.

It isn't good enough for some apps e.g. ethernet frequency reference.
Not sure about USB.

If you need a better clock, buy an XO. It will probably be trimmed to
a few PPM, and it will always oscillate, and will probably be cheaper.

Good point... but you can't beat an xtal for 6p (1k+)

 

On Wed, 06 Nov 2019 16:14:47 +0000, Peter <nospam@nospam9876.com>
wrote:

jlarkin@highlandsniptechnology.com wrote:

We use the free internal clock on the ST processors; it's good enough
for most uses.

It isn't good enough for some apps e.g. ethernet frequency reference.
Not sure about USB.

Our latest topology is


ST has a boot loaded in its flash, programmed by jtag

ST has an external pluging flash chip, on an SPI port

The external flash has cal table, factory and upgrade code images,
factory and upgrade FPGA configs

At powerup, the boot loader copies the correct code image into uP
flash, and runs that. Usually only once.

The code runs, and it reads and loads the FPGA config.

An XO clocks the FPGA, and it generates other clocks. FPGAs are good
at that.

Field upgrades can be done various ways, including sending the
customer a new flash chip to plug in.

If you need a better clock, buy an XO. It will probably be trimmed to
a few PPM, and it will always oscillate, and will probably be cheaper.

Good point... but you can't beat an xtal for 6p (1k+)

OK as long as you won't have to spend a few weeks fixing it and
requalifying crystals.



--

John Larkin Highland Technology, Inc

lunatic fringe electronics

 

[Peter]

jlarkin@highlandsniptechnology.com wrote

Some circuits are also sensitive to crystal parameters. You can be
happy for years and then have half your circuits not oscillate.

Is that really common?

I've never seen it, in 40+ years of micro development and production.

However, it is very likely that I have been overdriving xtals by a big
margin

Do they really fail when overdriven? How much is 1mW of power (10x
overdrive) in terms of heating?

 

On Wed, 6 Nov 2019 08:17:52 -0800 (PST), mpm <mpmillard@aol.com>
wrote:

On Wednesday, November 6, 2019 at 11:02:32 AM UTC-5,
Connecting a crystal and a couple of caps to an IC is a notoriously
flakey way to make a clock. Some impressive fraction of the time it
doesn't oscillate, and if it does the frequency could be anywhere.

I always understood that the issue was "guaranteed oscillator startup". The capacitors were there to make sure that happened.

And related to that is the issue of die shrink, where (over time) improvements in manufacturing processes result in smaller and smaller silicon dies (even though the IC package size doesn't change). The end result is longer internal lead wires which can change the amount of needed crystal loading. And THAT is why a lot of folks think that crystals are flaky - they are not accounting for die shrink (and honestly, how would they ever even know?)

Some circuits are also sensitive to crystal parameters. You can be
happy for years and then have half your circuits not oscillate.



--

John Larkin Highland Technology, Inc

lunatic fringe electronics

 

[Peter]

jlarkin@highlandsniptechnology.com wrote:

>9 pF is pretty intrusive.

Sorry. The ZS1000 is 0.9pF

 

[John Larkin]

On Wed, 06 Nov 2019 17:27:27 +0000, Peter <nospam@nospam9876.com>
wrote:

jlarkin@highlandsniptechnology.com wrote

Some circuits are also sensitive to crystal parameters. You can be
happy for years and then have half your circuits not oscillate.


Is that really common?

I've never seen it, in 40+ years of micro development and production.

I've seen it a few times, but after that I've been buying oscillators!

If you care about frequency accuracy, buy an oscillator.

In some companies, once engineering releases a design, manufacturing
and purchasing are free to buy cheaper things. When things go wrong,
they can always blame engineering.

Digikey has XOs and MEMS under 50 cents, so they are probably
available from China for less. Looks like the low end XO price range
is 1 to 9 cents on Alibaba.

We use a lot of VCXOs too, so we can trim or phase-lock. Both VCXOs
and TCXOs are crazy cheap nowadays. OCXOs even.

However, it is very likely that I have been overdriving xtals by a big
margin

Do they really fail when overdriven? How much is 1mW of power (10x
overdrive) in terms of heating?

Break some and see!

--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

 

[Tim Williams]

"Peter" <nospam@nospam9876.com> wrote in message
news:qpureh$efn$1@dont-email.me...

The branded Kyocera one
CL=8pF
ESR=60R
Pmax=100uW
C0=?

I think the chip pin and PCB capacitance is about 5pF, so what should
the two caps be?

If the load caps are 10pF, then both are really 15pF. Two 15pF in
series = 7.5pF so an 8pF xtal is right.

So for my "10pF" chinese one I should be used two 15pF caps. Is this
right? It seems weird.

Yup, that is correct!

Presumably getting this wrong doesn't change the starting conditions
for the oscillator; it just makes the frequency slightly off, a few
ppm?

Getting the capacitors wrong, also changes what impedance the crystal is
transformed into -- you're actually making a parallel resonant tank, that's
what the oscillator needs, but the crystal is series. There's some RF /
impedance network magic that occurs, converting the crystal's series
resonance into effectively a parallel resonance. The conversion factor, in
part, is the capacitors' reactance.

So, if the capacitors are too small, the impedance may be too high and,
well, that would probably be fine actually, but what you don't know is
whether the oscillator's input pin has any loading resistance.

In the general case, the input has a finite resistance -- like the base
resistance in a BJT Pierce oscillator. Clearly you're making an impedance
divider between the crystal and that input resistance, and you don't want to
end up on the wrong side of that.

In this case, the CMOS input probably does have a high impedance, so it
probably will still work. It's not obvious how much internal feedback or
loss there may be, and so at what point it will fail. But given that
there's only a factor of 4 between proper loading and no external loading
(pin capacitance alone), you might not be able to reach that point in this
case. The only downside then would be the shift in frequency.

As for higher capacitance, that lowers the resonator impedance, and the
oscillator only has so much output power and gain, and at some point it
won't oscillate, it will be damped instead. That's well in the marginal
range, of course.

The series resistor is more tricky.

Normally with oscillators around chips I have seen a swing on the
driving pin of almost GND to VCC, and perhaps 1/3 of that on the other
side of the xtal. Most people never bother with this resistor.

But I have seen some weird things on 32768Hz oscillators. Years ago I
had a design which would mysteriously gain maybe a minute per week. I
never worked out why. The RTC was a DS11302 - perhaps the lowest power
RTC ever. I reckoned that some RF was getting in.

Yeah, there are different kinds of oscillators; some are literally just what
they say, a couple inverters, biased logic level input, logic level output.
CMOS or what have you.

These, you need a series resistor to limit the power into the crystal, and
to match its impedance -- you have a filter network, and it needs a
termination resistor somewhere. You could perhaps put the resistor at the
other side (to ground, through a coupling capacitor so as not to affect the
DC bias), but that puts more power through the crystal, which may be too
much.

Others are constant current drivers, or at least higher impedance. The
current may be switched (CMOS logic into something that I guess would look
much like half an LVDS output stage), or it may be a fully analog circuit
(as with a typical unbuffered CMOS inverter). These, the damping is
provided by the crystal ESR, which needs to be appropriate; again, that's
transformed by CL to the resonator impedance. These can be the most
efficient, because the least loss is present in the circuit.

It may also be that they use really long transistors (high Rds(on)), or
literally just use the big series resistor but put it inside instead. These
work similarly, but as some power is dissipated internally by that damping
resistance, the power consumption should be higher.

As for what's out there -- several families of MCUs have selectable drive
strength. I think some STM32s offer this, and MSP430s, and I think even
some AVRs for example. You need enough drive (in terms of power at a
typical crystal voltage or current, or in terms of gain versus resonator
attenuation) for the crystal in question, and if you're having problems, you
can potentially just select the next level up, maybe adjust CL, and be set.

Regarding 32kHz crystals -- spooky things can happen, because the impedance
is quite high. CL is similar (10s pF) but the frequency is a fraction of
the other case. So the resonator impedance is huge, like 100kohms or more.
It doesn't take much interference, say in the electric field from a nearby
wire, at just the right frequency, to screw that up.

Good layout isn't so much of a problem, it's more about overall physical
size, and having ground around it. Place the crystal beside the oscillator,
not at a distance. Provide backside or internal ground plane. Don't route
other signals beside or underneath it. Some say to put guard traces around
it on top as well, but that's kind of silly to be honest. If you use a
4-pin crystal with case/shield/ground connections, ground it. Worst case,
put an RF shield over everything.

Tim

--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Design
Website: https://www.seventransistorlabs.com/

 

[Steve Wilson]

Peter <nospam@nospam9876.com> wrote:

jlarkin@highlandsniptechnology.com wrote

Some circuits are also sensitive to crystal parameters. You can be
happy for years and then have half your circuits not oscillate.

Is that really common?

I've never seen it, in 40+ years of micro development and production.

However, it is very likely that I have been overdriving xtals by a big
margin

Do they really fail when overdriven? How much is 1mW of power (10x
overdrive) in terms of heating?

Overdriving can fracture the crystal.

The acceleration in shear mode can be 10 million G. See John R. Vig, March
2004, "Quartz Crystal Resonators and Oscillators", Page 55,

https://escies.org/download/webDocumentFile?id=62209

Other failure modes are shown in VIG, April 2012, Page 7-8,

https://www.vcamerica.com/pub/media/documents/vig3.pdf

Note, if the drive level is too low, the crystal may not start. This is a
case where the oscillator can meet the Barkhausen Critera, and the
oscillator won't start. Other failure modes are shown above.

https://en.wikipedia.org/wiki/Barkhausen_stability_criterion

You should get the recommended drive level from the manufacturer. If it is
not available, then data for similar crystals may be helpful.

To find the actual drive level in your circuit, you need to know the actual
current and the crystal ESR. Measurements may not be feasible if the
current is too low or above the frequency range of your current probe

Perhaps the most useful method is to model the oscillator in LTspice. An
example is file 08.ASC, "Pierce crystal oscillator with B-source", in
Oscillators.zip, at

https://drive.google.com/open?id=1ZsbpkV0aaKS5LURIb1dfu_ndshsSaYtf

The run time on my system is 49.210 seconds.

Once you know the crystal current and ESR, then the power dissipated in the
crystal is simply P = I^2 * ESR.

 

[mpm]

On Wednesday, November 6, 2019 at 1:54:47 PM UTC-5, John Larkin wrote:

Is that really common?

I've never seen it, in 40+ years of micro development and production.

I'll just throw this out there....

One design I'm on uses the AT89LP51ED2 (an 8051 derivative).

1) I noticed that the part has a fuse setting for applying additional power to the oscillator for use at higher frequencies. The part is good for up to 20 MHz crystal.

2) I also noticed that the part has an internal 8 MHz oscillator, with the added bonus that it frees up the XTAL pins for use as general purpose I/O.

Nothing is time-sensitive in this design except for the 4800 Baud rate generator. I'm tempted to see how accurate the 4800 BRG timer is with just the internal osc., and perhaps shave a few pennies off the BOM. ???

Overall, I can't remember the last time I had a design fail due to crystal oscillator start-up failure. In fact, it may never have happened.

 

[Steve Wilson]

Steve Wilson <no@spam.com> wrote:

Perhaps the most useful method is to model the oscillator in LTspice. An
example is file 08.ASC, "Pierce crystal oscillator with B-source", in
Oscillators.zip, at

https://drive.google.com/open?id=1ZsbpkV0aaKS5LURIb1dfu_ndshsSaYtf

The run time on my system is 49.210 seconds.

Correction - 14 seconds. I guess javascript got all messed up on some site
snd that slowed the whole computer. Rebooting fixed it.

 

On Thu, 7 Nov 2019 01:52:26 -0000 (UTC), Steve Wilson <no@spam.com>
wrote:

Peter <nospam@nospam9876.com> wrote:

jlarkin@highlandsniptechnology.com wrote

Some circuits are also sensitive to crystal parameters. You can be
happy for years and then have half your circuits not oscillate.

Is that really common?

I've never seen it, in 40+ years of micro development and production.

However, it is very likely that I have been overdriving xtals by a big
margin

Do they really fail when overdriven? How much is 1mW of power (10x
overdrive) in terms of heating?

Overdriving can fracture the crystal.

The acceleration in shear mode can be 10 million G. See John R. Vig, March
2004, "Quartz Crystal Resonators and Oscillators", Page 55,

https://escies.org/download/webDocumentFile?id=62209

Other failure modes are shown in VIG, April 2012, Page 7-8,

https://www.vcamerica.com/pub/media/documents/vig3.pdf

Note, if the drive level is too low, the crystal may not start. This is a
case where the oscillator can meet the Barkhausen Critera, and the
oscillator won't start. Other failure modes are shown above.

I think it's a matter of gain, not amplitude. A crystal is linear.



--

John Larkin Highland Technology, Inc

lunatic fringe electronics

 

[Jan Panteltje]

Nothing is time-sensitive in this design except for the 4800 Baud rate generator. I'm tempted to see how accurate the 4800 BRG
timer is with just the internal osc., and perhaps shave a few pennies off the BOM. ???

That sort of serial com usually samples at 1/2 bit time, allowed tolerances are huge.
I use it with Microchip PIC internal oscillator all the time.
Done TX and RX even without UART in software.

As to the other issues I never had an XO fail..
as to the power issues I have done xtal oscillators with tubes and huge voltages.
Yes I have done 100 kHz in my first home build nixy 5 decade frequency counter too.

If I need a 'sort of' accurate? xtal oscillator I use one transistor and 1 resistor and 1 capacitor,
like here:
http://panteltje.com/panteltje/raspberry_pi_dvb-s_transmitter/Raspberry_Pi_DVB-S_transmitter_circuit_diagram_IMG_3961.JPG
hehe .cannot read it...

OK then, detail:
http://panteltje.com/pub/sxo.gif


I'd just use the internal osc on that chip if it has one and be done with it.

 

[Steve Wilson]

jlarkin@highlandsniptechnology.com wrote:

Other failure modes are shown in VIG, April 2012, Page 7-8,

https://www.vcamerica.com/pub/media/documents/vig3.pdf

Note, if the drive level is too low, the crystal may not start. This is a
case where the oscillator can meet the Barkhausen Critera, and the
oscillator won't start. Other failure modes are shown above.

I think it's a matter of gain, not amplitude. A crystal is linear.

Contamination can cause nonlinearities

See Page 3-32, Vig, April 2012

Contamination control
contamination can adversely affect
- nonlinearities and resistance anomalies (high starting
resistance)

For more info on contamination, see Wikipedia:

https://en.wikipedia.org/wiki/Crystal_oscillator#Production

For low drive level problems, the cure is to increase the drive level.

The problem is too high a drive level may cause mode skipping, spurious
frequencies, or even crystal fracture.

The cure is to operate within the manufacturer's drive level
specifications. However, it may be difficult to measure if it is too low or
beyond the current probe frequency range.

The cure is to model the oscillator in LTspice. See

08.ASC, Pierce crystal oscillator with B-source

https://drive.google.com/open?id=1ZsbpkV0aaKS5LURIb1dfu_ndshsSaYtf

Modeling allows changing any of the circuit parameters very easily. You can
even model spurious resonances by adding one or more crystals in parallel
with the main one.

For spurious frequencies, see Vig, April 2012, Pages 58, 59 and 67.

 

[Don Kuenz, KB7RPU]

Jan Panteltje <pNaOnStPeAlMtje@yahoo.com> wrote:

mpm wrote:
Nothing is time-sensitive in this design except for the 4800 Baud rate
generator. I'm tempted to see how accurate the 4800 BRG
timer is with just the internal osc., and perhaps shave a few pennies
off the BOM. ???

That sort of serial com usually samples at 1/2 bit time, allowed
tolerances are huge.
I use it with Microchip PIC internal oscillator all the time.
Done TX and RX even without UART in software.

As to the other issues I never had an XO fail..
as to the power issues I have done xtal oscillators with tubes and huge
voltages.
Yes I have done 100 kHz in my first home build nixy 5 decade frequency
counter too.

If I need a 'sort of' accurate? xtal oscillator I use one transistor and
1 resistor and 1 capacitor,
like here:
http://panteltje.com/panteltje/raspberry_pi_dvb-s_transmitter/Raspberry_Pi_DVB-S_transmitter_circuit_diagram_IMG_3961.JPG
hehe .cannot read it...

OK then, detail:
http://panteltje.com/pub/sxo.gif

I'd just use the internal osc on that chip if it has one and be done with it.

The easy to use internal oscillator also works good enough for me so
far. It may not work so well in a high speed digital circuit, but that's
someone else's problem, not mine. LOL.

Thank you, 73,

--
Don Kuenz KB7RPU
There was a young lady named Bright Whose speed was far faster than light;
She set out one day In a relative way And returned on the previous night.

 

On Thu, 7 Nov 2019 10:52:44 -0000 (UTC), Steve Wilson <no@spam.com>
wrote:

jlarkin@highlandsniptechnology.com wrote:

Other failure modes are shown in VIG, April 2012, Page 7-8,

https://www.vcamerica.com/pub/media/documents/vig3.pdf

Note, if the drive level is too low, the crystal may not start. This is a
case where the oscillator can meet the Barkhausen Critera, and the
oscillator won't start. Other failure modes are shown above.

I think it's a matter of gain, not amplitude. A crystal is linear.

Contamination can cause nonlinearities

See Page 3-32, Vig, April 2012

Contamination control
contamination can adversely affect
- nonlinearities and resistance anomalies (high starting
resistance)

For more info on contamination, see Wikipedia:

https://en.wikipedia.org/wiki/Crystal_oscillator#Production

For low drive level problems, the cure is to increase the drive level.

The problem is too high a drive level may cause mode skipping, spurious
frequencies, or even crystal fracture.

The cure is to operate within the manufacturer's drive level
specifications. However, it may be difficult to measure if it is too low or
beyond the current probe frequency range.

The cure is to model the oscillator in LTspice. See

08.ASC, Pierce crystal oscillator with B-source

https://drive.google.com/open?id=1ZsbpkV0aaKS5LURIb1dfu_ndshsSaYtf

Modeling allows changing any of the circuit parameters very easily. You can
even model spurious resonances by adding one or more crystals in parallel
with the main one.

For spurious frequencies, see Vig, April 2012, Pages 58, 59 and 67.

If a crystal has some sort of static friction effect, namely needs a
mimimum power drive to resonate, how does a crystal oscillator ever
get started? It won't have its 1 mw or whatever required
resonant-frequency drive until it's already oscillating.


This actually works, at least the single time I tried it:

https://www.dropbox.com/s/xbjmhido66u6slz/XO.JPG?raw=1

I never had the guts to do that in production.





--

John Larkin Highland Technology, Inc

lunatic fringe electronics