74HC74 oscillator simulation

[bitrex]

IRL I don't think there's anything this configuration of the 'HC74 could
do but oscillate; with an RC network from not-Q to not-CLR and D, CLK,
and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

<https://imgur.com/a/Idv4LSs>

 

[Rick C]

On Saturday, August 3, 2019 at 12:06:10 PM UTC-4, bitrex wrote:

IRL I don't think there's anything this configuration of the 'HC74 could
do but oscillate; with an RC network from not-Q to not-CLR and D, CLK,
and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

Are we supposed to know what the two traces are in the circuit?

If they are the two ends of the resistor, there is something wrong. I expect it is the model of the FF. Perhaps the model is not gate accurate. Try driving the CLR- input from a square wave and see if the Q- is inverted from that.

--

Rick C.

- Get 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

 

[bitrex]

On 8/3/19 12:19 PM, Rick C wrote:

On Saturday, August 3, 2019 at 12:06:10 PM UTC-4, bitrex wrote:
IRL I don't think there's anything this configuration of the 'HC74 could
do but oscillate; with an RC network from not-Q to not-CLR and D, CLK,
and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

Are we supposed to know what the two traces are in the circuit?

If they are the two ends of the resistor, there is something wrong. I expect it is the model of the FF. Perhaps the model is not gate accurate. Try driving the CLR- input from a square wave and see if the Q- is inverted from that.

I noticed just now I made a mistake setting up the sim, when using these
digital models one is supposed to set the line:

SpiceModel: VCC 0

at 0

not VCC 5

as I had it.

and VCC=5 SPEED=1.0 TRIPDT=1e-9

for SpiceLine.

Not super intuitive but is what it is I guess I don't use the digital
models often.

No guarantee it will fix this particular situation but it should make
the models actually, like, work in general

 

[bitrex]

On 8/3/19 12:06 PM, bitrex wrote:

IRL I don't think there's anything this configuration of the 'HC74 could
do but oscillate; with an RC network from not-Q to not-CLR and D, CLK,
and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

plz use this link instead

<https://imgur.com/a/ochGSav>

 

[John Larkin]

On Sat, 3 Aug 2019 12:06:05 -0400, bitrex <user@example.net> wrote:

IRL I don't think there's anything this configuration of the 'HC74 could
do but oscillate; with an RC network from not-Q to not-CLR and D, CLK,
and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

The voltage gain from \Q to \CLR is low, and there's no schmitt
action, so you can get a stable negative feedback loop. It would
likely oscillate at a higher frequency, where the logic prop delay
becomes important.

Why not use a schmitt inverter? This circuit could be rescued, but it
would take more parts.

Maybe "ground" C1 to Q?

But I wouldn't trust the Spice models for what is basically analog
behavior.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics

 

[Andy Bennet]

On 03/08/2019 17:06, bitrex wrote:

IRL I don't think there's anything this configuration of the 'HC74 could
do but oscillate; with an RC network from not-Q to not-CLR and D, CLK,
and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

74HC132 or if you just want simplest then 74HC14

 

[John Larkin]

On Sat, 03 Aug 2019 09:24:40 -0700, John Larkin
<jjlarkin@highlandtechnology.com> wrote:

On Sat, 3 Aug 2019 12:06:05 -0400, bitrex <user@example.net> wrote:

IRL I don't think there's anything this configuration of the 'HC74 could
do but oscillate; with an RC network from not-Q to not-CLR and D, CLK,
and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

The voltage gain from \Q to \CLR is low,

Actually meant \CLR to \Q, the gain inside the IC.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics

 

[bitrex]

On 8/3/19 12:24 PM, John Larkin wrote:

On Sat, 3 Aug 2019 12:06:05 -0400, bitrex <user@example.net> wrote:

IRL I don't think there's anything this configuration of the 'HC74 could
do but oscillate; with an RC network from not-Q to not-CLR and D, CLK,
and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

The voltage gain from \Q to \CLR is low, and there's no schmitt
action, so you can get a stable negative feedback loop. It would
likely oscillate at a higher frequency, where the logic prop delay
becomes important.

Why not use a schmitt inverter? This circuit could be rescued, but it
would take more parts.

Maybe "ground" C1 to Q?

But I wouldn't trust the Spice models for what is basically analog
behavior.

Check this out someone actually got a patent for this back in 1990 (the
crystal probably helps a lot):

<https://imgur.com/a/YryI2p6>


I noticed just now I made a mistake setting up the sim, when using these
digital models one is supposed to set the line:

SpiceModel: VCC 0

at 0

not VCC 5

as I had it.

and VCC=5 SPEED=1.0 TRIPDT=1e-9

for SpiceLine.

Not super intuitive but is what it is I guess I don't use the digital
models often.

No guarantee it will fix this particular situation but it should make
the models actually, like, work in general

 

[bitrex]

On 8/3/19 12:59 PM, John Larkin wrote:

On Sat, 03 Aug 2019 09:24:40 -0700, John Larkin
jjlarkin@highlandtechnology.com> wrote:

On Sat, 3 Aug 2019 12:06:05 -0400, bitrex <user@example.net> wrote:

IRL I don't think there's anything this configuration of the 'HC74 could
do but oscillate; with an RC network from not-Q to not-CLR and D, CLK,
and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

The voltage gain from \Q to \CLR is low,

Actually meant \CLR to \Q, the gain inside the IC.

The easy thing to do to get a square wave is the schmitt inverter, I'd
like a low frequency (10s of Hz) with the Q and not Q outputs but I
don't wanna use a large R, large cap, wanna use a small R and cap that's
relatively cheap to get tight tolerance/tempco on the components.

The easy thing to then do is run a higher frequency from the standard
schmitt inverter with smaller Rc, C into a divider chain.

But it would be cool if there were some self-oscillating structure of
flops that did it all without needing the Schmitt inverter at all, so
far my attempts to find it have been unproductive though

If you have Q and not Q whether from a flip-flop or just from a set of
appropriately-connected inverters it might be possible to bootstrap the
RC constant capacitor somehow instead of grounding it.

 

[piglet]

On 03/08/2019 5:08 pm, bitrex wrote:

On 8/3/19 12:06 PM, bitrex wrote:
IRL I don't think there's anything this configuration of the 'HC74
could do but oscillate; with an RC network from not-Q to not-CLR and
D, CLK, and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

plz use this link instead

https://imgur.com/a/ochGSav

Way back when I did get CMOS 4013A to oscillate sucessfully. I seem to
remember it needed 2 caps and 2 Rs though. Was fine until the buffered
series 4013B took hold and 4013A became hard to get. The extra internal
buffer stages refused to play such dirty tricks.

piglet

 

[Tauno Voipio]

On 3.8.19 19:58, bitrex wrote:

On 8/3/19 12:24 PM, John Larkin wrote:
On Sat, 3 Aug 2019 12:06:05 -0400, bitrex <user@example.net> wrote:

IRL I don't think there's anything this configuration of the 'HC74 could
do but oscillate; with an RC network from not-Q to not-CLR and D, CLK,
and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

The voltage gain from \Q to \CLR is low, and there's no schmitt
action, so you can get a stable negative feedback loop. It would
likely oscillate at a higher frequency, where the logic prop delay
becomes important.

Why not use a schmitt inverter? This circuit could be rescued, but it
would take more parts.

Maybe "ground" C1 to Q?

But I wouldn't trust the Spice models for what is basically analog
behavior.



Check this out someone actually got a patent for this back in 1990 (the
crystal probably helps a lot):

https://imgur.com/a/YryI2p6

An idea can be patented even if it does not work.

--

-TV

 

[Rick C]

On Saturday, August 3, 2019 at 2:28:58 PM UTC-4, Tauno Voipio wrote:

On 3.8.19 19:08, bitrex wrote:
On 8/3/19 12:06 PM, bitrex wrote:
IRL I don't think there's anything this configuration of the 'HC74
could do but oscillate; with an RC network from not-Q to not-CLR and
D, CLK, and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

plz use this link instead

https://imgur.com/a/ochGSav

Your circuit is simply wrong: there is a stable state
with both Q- and CLR- high.

I think not. The PRE- pin is grounded. If CLR- is high the Q is 1 and Q- is 0. The circuit should work in simulation. If the waveform shown in the picture is anything relative to the Q- output, there is something logically wrong with the simulation... which is very possible if the FF doesn't initialize properly.

--

Rick C.

+ Get 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209

 

[Tauno Voipio]

On 3.8.19 19:08, bitrex wrote:

On 8/3/19 12:06 PM, bitrex wrote:
IRL I don't think there's anything this configuration of the 'HC74
could do but oscillate; with an RC network from not-Q to not-CLR and
D, CLK, and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

plz use this link instead

https://imgur.com/a/ochGSav

Your circuit is simply wrong: there is a stable state
with both Q- and CLR- high.

The classic oscillator (though bad) is to use a Schmitt
with integrating feedback.

--

-TV

 

[bitrex]

On 8/3/19 2:40 PM, Rick C wrote:

On Saturday, August 3, 2019 at 2:28:58 PM UTC-4, Tauno Voipio wrote:
On 3.8.19 19:08, bitrex wrote:
On 8/3/19 12:06 PM, bitrex wrote:
IRL I don't think there's anything this configuration of the 'HC74
could do but oscillate; with an RC network from not-Q to not-CLR and
D, CLK, and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

plz use this link instead

https://imgur.com/a/ochGSav

Your circuit is simply wrong: there is a stable state
with both Q- and CLR- high.

I think not. The PRE- pin is grounded. If CLR- is high the Q is 1 and Q- is 0. The circuit should work in simulation. If the waveform shown in the picture is anything relative to the Q- output, there is something logically wrong with the simulation... which is very possible if the FF doesn't initialize properly.

With the error that I made wrt setting parameters corrected and the sim
tested such that the flip flop divides down and otherwise operates
correctly here is the output in the former configuration, with more
clear labeling of voltages. also no oscillation.

<https://imgur.com/a/tHr6Qij>

 

[John Larkin]

On Sat, 3 Aug 2019 21:31:15 +0300, Tauno Voipio
<tauno.voipio@notused.fi.invalid> wrote:

On 3.8.19 19:58, bitrex wrote:
On 8/3/19 12:24 PM, John Larkin wrote:
On Sat, 3 Aug 2019 12:06:05 -0400, bitrex <user@example.net> wrote:

IRL I don't think there's anything this configuration of the 'HC74 could
do but oscillate; with an RC network from not-Q to not-CLR and D, CLK,
and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

The voltage gain from \Q to \CLR is low, and there's no schmitt
action, so you can get a stable negative feedback loop. It would
likely oscillate at a higher frequency, where the logic prop delay
becomes important.

Why not use a schmitt inverter? This circuit could be rescued, but it
would take more parts.

Maybe "ground" C1 to Q?

But I wouldn't trust the Spice models for what is basically analog
behavior.



Check this out someone actually got a patent for this back in 1990 (the
crystal probably helps a lot):

https://imgur.com/a/YryI2p6

An idea can be patented even if it does not work.

For some people, getting patents is a kind of addiction.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics

 

[bitrex]

On 8/3/19 2:40 PM, Rick C wrote:

On Saturday, August 3, 2019 at 2:28:58 PM UTC-4, Tauno Voipio wrote:
On 3.8.19 19:08, bitrex wrote:
On 8/3/19 12:06 PM, bitrex wrote:
IRL I don't think there's anything this configuration of the 'HC74
could do but oscillate; with an RC network from not-Q to not-CLR and
D, CLK, and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

plz use this link instead

https://imgur.com/a/ochGSav

Your circuit is simply wrong: there is a stable state
with both Q- and CLR- high.

I think not. The PRE- pin is grounded. If CLR- is high the Q is 1 and Q- is 0. The circuit should work in simulation. If the waveform shown in the picture is anything relative to the Q- output, there is something logically wrong with the simulation... which is very possible if the FF doesn't initialize properly.

I think the oscillator relies on the 0/0 state at the not-PRE/not-CLR
inputs being metastable to start up, but the model's state is not
actually metastable.

 

[Rick C]

On Saturday, August 3, 2019 at 4:14:51 PM UTC-4, bitrex wrote:

On 8/3/19 4:00 PM, John Larkin wrote:
On Sat, 3 Aug 2019 15:12:01 -0400, bitrex <user@example.net> wrote:

With the error that I made wrt setting parameters corrected and the sim
tested such that the flip flop divides down and otherwise operates
correctly here is the output in the former configuration, with more
clear labeling of voltages. also no oscillation.

https://imgur.com/a/tHr6Qij

You might try a real flop. The model may not properly handle this
case.



Yeah I don't know if it's a model problem at this point or if this
circuit is just a bust I'm curious now.

It would be amusing/sad if that referenced patent just didn't work at
all. Maybe the crystal makes the "magic" happen

It's not magic. Just that most people aren't familiar with the issues of designing an oscillator. I assume this is not a circuit which is important to operate in a real circuit. Oscillators like this can have intermittent startup problems. I just use oscillators these days. Easier. Even when the oscillator is in an MCU they do a crappy job of specifying the crystal parameters. You have to beg for things like ESR of the crystal. Pick the wrong part and it will work fine on the bench, them may not start reliably with changes in temperature, etc.

You could try working that thread again. I can't find the model you indicate at ADI (bought LT). Try copying the text in Harald's post and make helmut's modification. Harald said that was what worked for him.

--

Rick C.

-+ Get 1,000 miles of free Supercharging
-+ Tesla referral code - https://ts.la/richard11209

 

[bitrex]

On 8/3/19 1:34 PM, bitrex wrote:

On 8/3/19 12:59 PM, John Larkin wrote:
On Sat, 03 Aug 2019 09:24:40 -0700, John Larkin
jjlarkin@highlandtechnology.com> wrote:

On Sat, 3 Aug 2019 12:06:05 -0400, bitrex <user@example.net> wrote:

IRL I don't think there's anything this configuration of the 'HC74
could
do but oscillate; with an RC network from not-Q to not-CLR and D, CLK,
and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

The voltage gain from \Q to \CLR is low,

Actually meant \CLR to \Q, the gain inside the IC.



The easy thing to do to get a square wave is the schmitt inverter, I'd
like a low frequency (10s of Hz) with the Q and not Q outputs but I
don't wanna use a large R, large cap, wanna use a small R and cap that's
relatively cheap to get tight tolerance/tempco on the components.

The easy thing to then do is run a higher frequency from the standard
schmitt inverter with smaller Rc, C into a divider chain.

But it would be cool if there were some self-oscillating structure of
flops that did it all without needing the Schmitt inverter at all, so
far my attempts to find it have been unproductive though

If you have Q and not Q whether from a flip-flop or just from a set of
appropriately-connected inverters it might be possible to bootstrap the
RC constant capacitor somehow instead of grounding it.

I think a ripple counter would work fine to divide down a clock from a
faster Schmitt oscillator, also. Then I could use the fast clock for
some other purpose. That'd be cool.

 

[bitrex]

On 8/3/19 4:00 PM, John Larkin wrote:

On Sat, 3 Aug 2019 15:12:01 -0400, bitrex <user@example.net> wrote:

On 8/3/19 2:40 PM, Rick C wrote:
On Saturday, August 3, 2019 at 2:28:58 PM UTC-4, Tauno Voipio wrote:
On 3.8.19 19:08, bitrex wrote:
On 8/3/19 12:06 PM, bitrex wrote:
IRL I don't think there's anything this configuration of the 'HC74
could do but oscillate; with an RC network from not-Q to not-CLR and
D, CLK, and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

plz use this link instead

https://imgur.com/a/ochGSav

Your circuit is simply wrong: there is a stable state
with both Q- and CLR- high.

I think not. The PRE- pin is grounded. If CLR- is high the Q is 1 and Q- is 0. The circuit should work in simulation. If the waveform shown in the picture is anything relative to the Q- output, there is something logically wrong with the simulation... which is very possible if the FF doesn't initialize properly.


With the error that I made wrt setting parameters corrected and the sim
tested such that the flip flop divides down and otherwise operates
correctly here is the output in the former configuration, with more
clear labeling of voltages. also no oscillation.

https://imgur.com/a/tHr6Qij

You might try a real flop. The model may not properly handle this
case.

Yeah I don't know if it's a model problem at this point or if this
circuit is just a bust I'm curious now.

It would be amusing/sad if that referenced patent just didn't work at
all. Maybe the crystal makes the "magic" happen

 

[John Larkin]

On Sat, 3 Aug 2019 15:12:01 -0400, bitrex <user@example.net> wrote:

On 8/3/19 2:40 PM, Rick C wrote:
On Saturday, August 3, 2019 at 2:28:58 PM UTC-4, Tauno Voipio wrote:
On 3.8.19 19:08, bitrex wrote:
On 8/3/19 12:06 PM, bitrex wrote:
IRL I don't think there's anything this configuration of the 'HC74
could do but oscillate; with an RC network from not-Q to not-CLR and
D, CLK, and not-PRE grounded.

But with these models from the Yahoo LTSpice users group the LTSPice
time domain looks like it manages to find some other metastable state
and sits there spinning its wheels.

Can anyone suggest some ICs that could bust it out and get it to
square-wave in the sim? Thanks

https://imgur.com/a/Idv4LSs

plz use this link instead

https://imgur.com/a/ochGSav

Your circuit is simply wrong: there is a stable state
with both Q- and CLR- high.

I think not. The PRE- pin is grounded. If CLR- is high the Q is 1 and Q- is 0. The circuit should work in simulation. If the waveform shown in the picture is anything relative to the Q- output, there is something logically wrong with the simulation... which is very possible if the FF doesn't initialize properly.


With the error that I made wrt setting parameters corrected and the sim
tested such that the flip flop divides down and otherwise operates
correctly here is the output in the former configuration, with more
clear labeling of voltages. also no oscillation.

https://imgur.com/a/tHr6Qij

You might try a real flop. The model may not properly handle this
case.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics