74HC299 resetting when I clock in a 0 bit (Help, I'm at my w

[Anthony Fremont]

Hello all,

I'm tinkering with a 74HC299 and I'm having a bit of trouble. I am just
using it as a serial-in/parallel-out shift register. Whenever I clock
in 1 bits, all is fine. As soon as I clock in a single 0 bit, all the
output registers reset to 0 simultaneously as if I had driven the reset
pin low.

I have both OE pins tied low as I don't need the output pins blanked as
I set them up (maybe this is the problem?)
The reset(clear) pin is tied permanently high
I've tried left shifting *and* right shifting with identical results
Both serial input pins (left and right) are pulled up (I've tried them
pulled down too)
The cascade outputs are floating
..1uF and 10uF bypass caps on power pins

The datasheet is not real descriptive, but I think I got it hooked up
right. I even tried another chip with the same results. Obviously I'm
doing something stupid here, but I just don't get it. :-(

In summary: As long as I'm clocking in 1 bits, all is cool. The first
0 bit resets all the outputs. I hope this sounds familiar to somebody.

 

[Anthony Fremont]

"Robert Monsen" wrote

Anthony Fremont wrote:
Hello all,

I'm tinkering with a 74HC299 and I'm having a bit of trouble. I am
just
using it as a serial-in/parallel-out shift register. Whenever I
clock
in 1 bits, all is fine. As soon as I clock in a single 0 bit, all
the
output registers reset to 0 simultaneously as if I had driven the
reset
pin low.

<snipped more of my whining>

I'd guess that your clock is bouncing for some reason. Are you using a
button to clock it? You are probably getting hundreds of clock
transitions, so the single 0 you tried to clock in gets clocked into
every cell.

I'm using the SQW output (1Hz square wave) of a Dallas 1307 real time
clock chip. That signal is also driving a PIC RB0 interrupt line and
that is all working fine generating 1 interrupt per second, so I suspect
the clock signal is ok. Plus, clocking in 1 bits results in the correct
operation of the first output turning on followed by the next on the
next clock tick etc... But as soon as I apply a 0 bit and clock it in,
the outputs all reset. It's too weird, I know it's something dumb, but
I've checked and rechecked every pin (all 20) I am manually switching
the data input pin (it has a weak pullup resistor) by attaching a wire
to ground, but the clock signal should be good.

If you have a schmitt trigger buffer (or inverter) try using that
between your clock and your shift register. Or, just debounce the
button
like this:

VCC
.--o--.
| |
| .-.
--- | | 100k
0.1uF--- | |
N/O | '-'
Button | |
| |
| | |
--- | |
.---o o-------o-----o--------- Out
|
===
GND
(created by AACircuit v1.28 beta 10/06/04 www.tech-chat.de)

The other thing to check is that you have Vcc connected. You can power
cmos through inputs, which has confused me before. Seems to work until
you change a data input.

BTDT ;-)) I thought there were ghosts in my PIC. But this does
describe the precise behavior that I am seeing. Right now I'm using a
pull-down on the data input pin. When I put a jumper wire from the
input pin to Vcc, 1 LED lights each second in the proper sequence
exactly as it should. As soon as I remove the jumper letting the pull
down do it's job, the outputs all reset. Vcc is verified at +5V (pin
20) and Gnd (pin 10) is at ground potential. I can tell that they all
reset precisely when the rising clock occurs clocking in the 0, not when
the data changes.

Thanks for the help.

 

[Alfred Gemsa]

Anthony Fremont schrieb:

The datasheet is not real descriptive, but I think I got it hooked up
right. I even tried another chip with the same results. Obviously I'm
doing something stupid here, but I just don't get it. :-(

In summary: As long as I'm clocking in 1 bits, all is cool. The first
0 bit resets all the outputs. I hope this sounds familiar to somebody.

What's about pin 1 and 19? If they are both high the next clock would do
a parallel load.

 

[Anthony Fremont]

"Alfred Gemsa" <AGemsa@t-online.de> wrote in message
news:38nlcdF5ogh3nU1@individual.net...

Anthony Fremont schrieb:

The datasheet is not real descriptive, but I think I got it hooked
up
right. I even tried another chip with the same results. Obviously
I'm
doing something stupid here, but I just don't get it. :-(

In summary: As long as I'm clocking in 1 bits, all is cool. The
first
0 bit resets all the outputs. I hope this sounds familiar to
somebody.

What's about pin 1 and 19? If they are both high the next clock would
do
a parallel load.

One is high, the other is low. I've tried both combinations (shifting
left and shifting right) with equal results.

 

[Anthony Fremont]

Turned out to be too weak of a pull-up on the clock line (100K) 10K was
too weak still, but 1K did it. The shift register needs rise and fall
times <500nS at 4.5V Vcc. Apparently the PIC chip is much more
forgiving on that.

Thanks for everyone's help.


"Anthony Fremont" <spam@anywhere.com> wrote in message
news:r4sVd.7713$SE2.4467@fe2.texas.rr.com...

Hello all,

I'm tinkering with a 74HC299 and I'm having a bit of trouble. I am
just
using it as a serial-in/parallel-out shift register. Whenever I clock
in 1 bits, all is fine. As soon as I clock in a single 0 bit, all the
output registers reset to 0 simultaneously as if I had driven the
reset
pin low.

I have both OE pins tied low as I don't need the output pins blanked
as
I set them up (maybe this is the problem?)
The reset(clear) pin is tied permanently high
I've tried left shifting *and* right shifting with identical results
Both serial input pins (left and right) are pulled up (I've tried them
pulled down too)
The cascade outputs are floating
.1uF and 10uF bypass caps on power pins

The datasheet is not real descriptive, but I think I got it hooked up
right. I even tried another chip with the same results. Obviously
I'm
doing something stupid here, but I just don't get it. :-(

In summary: As long as I'm clocking in 1 bits, all is cool. The
first
0 bit resets all the outputs. I hope this sounds familiar to
somebody.

 

[Robert Monsen]

Anthony Fremont wrote:

Hello all,

I'm tinkering with a 74HC299 and I'm having a bit of trouble. I am just
using it as a serial-in/parallel-out shift register. Whenever I clock
in 1 bits, all is fine. As soon as I clock in a single 0 bit, all the
output registers reset to 0 simultaneously as if I had driven the reset
pin low.

I have both OE pins tied low as I don't need the output pins blanked as
I set them up (maybe this is the problem?)
The reset(clear) pin is tied permanently high
I've tried left shifting *and* right shifting with identical results
Both serial input pins (left and right) are pulled up (I've tried them
pulled down too)
The cascade outputs are floating
.1uF and 10uF bypass caps on power pins

The datasheet is not real descriptive, but I think I got it hooked up
right. I even tried another chip with the same results. Obviously I'm
doing something stupid here, but I just don't get it. :-(

In summary: As long as I'm clocking in 1 bits, all is cool. The first
0 bit resets all the outputs. I hope this sounds familiar to somebody.

I'd guess that your clock is bouncing for some reason. Are you using a
button to clock it? You are probably getting hundreds of clock
transitions, so the single 0 you tried to clock in gets clocked into
every cell.

If you have a schmitt trigger buffer (or inverter) try using that
between your clock and your shift register. Or, just debounce the button
like this:

VCC
.--o--.
| |
| .-.
--- | | 100k
0.1uF--- | |
N/O | '-'
Button | |
| |
| | |
--- | |
.---o o-------o-----o--------- Out
|
===
GND
(created by AACircuit v1.28 beta 10/06/04 www.tech-chat.de)

The other thing to check is that you have Vcc connected. You can power
cmos through inputs, which has confused me before. Seems to work until
you change a data input.

--
Regards,
Robert Monsen

"Your Highness, I have no need of this hypothesis."
- Pierre Laplace (1749-1827), to Napoleon,
on why his works on celestial mechanics make no mention of God.