Cadence

J
Flat verilog netlist from Artist?
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0
Views
190
Jackson Harvey
J
C
Identfying area to place doubled contact
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0
Views
192
Chandramohan Neelakantan
C
J
Import a cell designed using other technology
Replies
2
Views
564
Andrew Beckett
A
A
verilog to schematic problem.
Replies
1
Views
1K
Bernd Fischer
B
A
pcellEvalFailed
Replies
1
Views
566
aditya
A
J
How to get VS off my design libraries?
Replies
2
Views
530
mRbONK
M
H
OK and Cancel buttons callback
Replies
3
Views
690
Jim Newton
J
J
Linux emulation of Sun Copy and Paste keys
Replies
7
Views
689
Harald Neubauer
H
S
saving custom data into artist states?
Replies
2
Views
687
Erik Wanta
E
M
Virtuoso Compactor Rules for tsmc .18 native
Replies
0
Views
192
Mark Holland
M
J
Monte-Carlo simulations
Replies
1
Views
564
Andrew Beckett
A
M
Assura question on density checking
Replies
1
Views
563
Jay Lessert
J
R
CAD Comparison
Replies
0
Views
185
Randy
R
M
Assura's dot files in the current directory -creates issues
Replies
7
Views
717
Manju Arasaiah
M
S
FOR SALE: CAD/CAM/CAE SOFTWARE
Replies
0
Views
188
Softseller
S
T
HDL Simulator and Current Simulation
Replies
0
Views
182
Thomas Popp
T
S
Spectre netlist -> HSpice netlist
Replies
0
Views
189
smartchi
S
K
How to specify DRC tempory directory
Replies
2
Views
560
Diva Physical Verificatio
D
F
Recommendation for Good Textbooks on EDA Design (PCB)
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0
Views
185
Flying Fox of the Snowy M
F
A
dbTransformCellView
Replies
1
Views
658
Andrew Beckett
A
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