H
hamkanen
Guest
Hi all,
i want to design a zero padding circuit.
The problem is the number of zero depends on the number of input data.
Let's say i have 2000 data input, the number of output data should b
divided by factor of 600.
So number of zero padding = 400 --> (2000+400)/600 = integer value
Remember that number of data input could vary, so it will change the numbe
of zero padding
Can you give me suggestion, how to implement zero padding circuit i
hardware?
*I plan to design the circuit 10 port parallely, so for above example, i
will need 200 clock to input all data.
Thanks
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Posted through http://www.FPGARelated.com
i want to design a zero padding circuit.
The problem is the number of zero depends on the number of input data.
Let's say i have 2000 data input, the number of output data should b
divided by factor of 600.
So number of zero padding = 400 --> (2000+400)/600 = integer value
Remember that number of data input could vary, so it will change the numbe
of zero padding
Can you give me suggestion, how to implement zero padding circuit i
hardware?
*I plan to design the circuit 10 port parallely, so for above example, i
will need 200 clock to input all data.
Thanks
---------------------------------------
Posted through http://www.FPGARelated.com