M
Mancini Stephane
Guest
Hi,
I would like to know if anybody here has tested the avnet VirtexII Pro
evaluation board with XC2VP7 or XC2VP20 chip (board ref : ADS-XLX-V2PRO-DEVP7-5
and ADS-XLX-V2PRO-DEVP20-5)
http://www.silica.com/eval_kits/ads-20030515.html
I would like to know if :
- it's possible to install an OS like linux or uclinux on this board ?
What about the linux port from http://penguinppc.org/dev/kernel.shtml
What about ucOSII (http://www.micrium.com)
- Is there any bottleneck to access the SRAM from the chip through the PCI bridge ?
By the way has anybody tried to put it in a PC and communicate with it?
The card seems to be delivered with a windows interface. What's this ?
How to use it with a PC running linux ?
Is it possible to programm the FPGA trough PCI (once in a PC) or is it mandatory to use
the standard way ?
- is there a way to connect it a display - LCD or video ?
More generally, about VirtexII Pro, it seems that all the coreconnect bus
stuff has to be synthesized using FPGA ressources ? At the opposite, it
seems the Excalibur Arm solution proposes a basic microsystem (a CPU with
some peripherals) which preserves FPGA ressources.
Am I right ?
What's the complexity of the coreconnect bus ? How many room is left
in XC2VP7 or XC2VP20 chips for, say, a single PLB bus, a SDRAM/RAM
controller, UART, timer and interface to
PCI (to the PC or PMC-daughter cards)?
Do I have to use two PLB bus if I use the XC2VP20 chip (with 2 PowerPC) ?
I understand that it doesn't consume multipliers but what about
combinatorial/sequencing logic for the bus stuff ?
Thanks a lot for your future responses
Stéphane
I would like to know if anybody here has tested the avnet VirtexII Pro
evaluation board with XC2VP7 or XC2VP20 chip (board ref : ADS-XLX-V2PRO-DEVP7-5
and ADS-XLX-V2PRO-DEVP20-5)
http://www.silica.com/eval_kits/ads-20030515.html
I would like to know if :
- it's possible to install an OS like linux or uclinux on this board ?
What about the linux port from http://penguinppc.org/dev/kernel.shtml
What about ucOSII (http://www.micrium.com)
- Is there any bottleneck to access the SRAM from the chip through the PCI bridge ?
By the way has anybody tried to put it in a PC and communicate with it?
The card seems to be delivered with a windows interface. What's this ?
How to use it with a PC running linux ?
Is it possible to programm the FPGA trough PCI (once in a PC) or is it mandatory to use
the standard way ?
- is there a way to connect it a display - LCD or video ?
More generally, about VirtexII Pro, it seems that all the coreconnect bus
stuff has to be synthesized using FPGA ressources ? At the opposite, it
seems the Excalibur Arm solution proposes a basic microsystem (a CPU with
some peripherals) which preserves FPGA ressources.
Am I right ?
What's the complexity of the coreconnect bus ? How many room is left
in XC2VP7 or XC2VP20 chips for, say, a single PLB bus, a SDRAM/RAM
controller, UART, timer and interface to
PCI (to the PC or PMC-daughter cards)?
Do I have to use two PLB bus if I use the XC2VP20 chip (with 2 PowerPC) ?
I understand that it doesn't consume multipliers but what about
combinatorial/sequencing logic for the bus stuff ?
Thanks a lot for your future responses
Stéphane