E
Edward
Guest
Hi All,
I am currently using XPower 5.2.03i with Modelsim 5.7d. To ensure that
the actual low-level design is condidered, I used the post place and
route Simulation model (i.e. vhd file generated in Project Navigator)
to generate a vcd file in modelsim.
The power estimate that results is far larger than that power
measurements made on hardware for the same set of inputs. Could it be
due to the fact that the model instead of the original high-level vhdl
files are used in the simulation in Modelsim. If so, what is the
remedy that would consider all the low-level aspects of the design
aside from adding the *.sdf file during modelsim simulation as well as
taking into account all nets.
Thanks a mil!
Ed
I am currently using XPower 5.2.03i with Modelsim 5.7d. To ensure that
the actual low-level design is condidered, I used the post place and
route Simulation model (i.e. vhd file generated in Project Navigator)
to generate a vcd file in modelsim.
The power estimate that results is far larger than that power
measurements made on hardware for the same set of inputs. Could it be
due to the fact that the model instead of the original high-level vhdl
files are used in the simulation in Modelsim. If so, what is the
remedy that would consider all the low-level aspects of the design
aside from adding the *.sdf file during modelsim simulation as well as
taking into account all nets.
Thanks a mil!
Ed