Xilinx's interp on EDIF properties

[Brannon King]

This line in EDIF works to change the IOSTANDARD:

(property IOSTANDARD (string "LVCMOS25"))

It seems to work whether on the pad instance or the buffer instance. What I
can't figure out is how to set the PULLUP/PULLDOWN stuff in EDIF. I end up
running the FPGA editor and turning it on manually after every build. I've
tried

(property PULLUP (string "TRUE"))
and
(property PULLUP (string "YES"))

on both the pad and the buffer but it seems that the tools entirely ignore
it. Any ideas?

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[Symon]

The libraries guide tells you how to instantiate a pullup in your HDL. Look
at the EDIF file your synthesiser creates from this.
Cheers, Syms.
"Brannon King" <bking@starbridgesystems.com> wrote in message
news:cbevfv$qpi@dispatch.concentric.net...

This line in EDIF works to change the IOSTANDARD:

(property IOSTANDARD (string "LVCMOS25"))

It seems to work whether on the pad instance or the buffer instance. What
I
can't figure out is how to set the PULLUP/PULLDOWN stuff in EDIF.

 

[Tim]

Brannon King wrote:

This line in EDIF works to change the IOSTANDARD:

(property IOSTANDARD (string "LVCMOS25"))

It seems to work whether on the pad instance or the buffer instance.
What I can't figure out is how to set the PULLUP/PULLDOWN stuff in
EDIF. I end up running the FPGA editor and turning it on manually
after every build. I've tried

(property PULLUP (string "TRUE"))
and
(property PULLUP (string "YES"))

on both the pad and the buffer but it seems that the tools entirely
ignore it. Any ideas?

At one point this worked, though the usage may now be deprecated:

(property xc_pullup (integer 1))

 

[Petter Gustad]

"Brannon King" <bking@starbridgesystems.com> writes:

It seems to work whether on the pad instance or the buffer instance. What I
can't figure out is how to set the PULLUP/PULLDOWN stuff in EDIF. I end up
running the FPGA editor and turning it on manually after every build. I've
tried

What synthesis tool do you use? If you use DC-FPGA or DC you can do

set edifout_write_properties_list "PULLUP PULLDOWN"

You will most likely add lots of other properties too (LOC,
IOSTANDARD, etc.)

Then you can use set_attribute to set the property.

set_attribute /yourdut/yourbuf PULLUP -type string TRUE

Then the property will be exported to the netlist when you do
write_file -f edif ...

Petter

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[jtw]

Others have suggested putting attributes or instantiating the PULLx in code;
have you tried putting the property in the constraints file?

JTW

"Brannon King" <bking@starbridgesystems.com> wrote in message
news:cbevfv$qpi@dispatch.concentric.net...

This line in EDIF works to change the IOSTANDARD:

(property IOSTANDARD (string "LVCMOS25"))

It seems to work whether on the pad instance or the buffer instance. What
I
can't figure out is how to set the PULLUP/PULLDOWN stuff in EDIF. I end up
running the FPGA editor and turning it on manually after every build. I've
tried

(property PULLUP (string "TRUE"))
and
(property PULLUP (string "YES"))

on both the pad and the buffer but it seems that the tools entirely ignore
it. Any ideas?

--
Prepend a 'b' to email me. Thanks.