Xilinx XST 9.1 and casez statement?

[Xilinx User]

Through a lot of bumbling in Webpack 9.1i.03, I found that my
state-machi\nes don't synthesize properly if I use the casez statement:

module x(
input wire [1:0] ps,
output reg [1:0] ns
);

localparam [2:0] STATE_1 = 3'd0,
STATE_2 = 3'd1,
STATE_3 = 3'd2,
STATE_4 = 3'd3;

always @* begin : state_machine
case ( ps )
STATE_1: ns = STATE_2;
STATE_2: ns = STATE_3;
STATE_3: ns = STATE_4;
STATE_4: ns = STATE_1;
'hz : ns = STATE_1; // <- all other values default to here
default : ns = 'hX; // <- Simulation-only, trap 'X's on ps[2:0]
endcase // ps
end

endmodule

XST completely optimizes out my logic!
"Slice Usage: 0" ?!?!

(For those wondering, 'casez' is a coding-trick to get Verilog-simulations
to
propagate 'X's through the state-machine. For synthesis, the 'hZ forces
all unused encodings/values to default to the known 'STATE_1', instead of
just leaving up to the tool to randomly optimize it.)

Now, I can switch back to using a traditional case() statement, but then I
sacrifice the simulation-X behavior.

Anybody else see this behavior with casez? Is it time to file a bug-report?

 

[Jonathan Bromley]

On Wed, 16 May 2007 05:53:35 -0700, "Xilinx User" <anonymous@net.com>
wrote:

Through a lot of bumbling in Webpack 9.1i.03, I found that my
state-machi\nes don't synthesize properly if I use the casez statement:

module x(
input wire [1:0] ps,
output reg [1:0] ns
);

localparam [2:0] STATE_1 = 3'd0,
STATE_2 = 3'd1,
STATE_3 = 3'd2,
STATE_4 = 3'd3;

always @* begin : state_machine
case ( ps )
STATE_1: ns = STATE_2;
STATE_2: ns = STATE_3;
STATE_3: ns = STATE_4;
STATE_4: ns = STATE_1;
'hz : ns = STATE_1; // <- all other values default to here
default : ns = 'hX; // <- Simulation-only, trap 'X's on ps[2:0]
endcase // ps
end

endmodule

Not answering your question, I know; but I don't think your
reasoning is right about the sim-vs-synth behaviour of this
case statement if you make it casez. In casez, a z bit in
the case selector expressions will match *anything* in the
case expression (ps), including Xs. So, if ps has
X values in it, the 'hz branch will be taken. The default
branch will never be taken in any circumstances.

XST completely optimizes out my logic!

I have no idea why the logic is disappearing
if you use casez. The four "real" branches are all OK.
Precision - for example - generates the expected logic
even with casez.

--
Jonathan Bromley, Consultant

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