Xilinx Xpower Issues - Help from xilinx team please

M

Mukesh Chugh

Guest
Hi,

I am facing following issues when using Xpower to calculate the
dynamic power for my design:

Tools being used:
Xilinx ISE 6.2, Xpower 6.2.03i
ModelSim XE II/ Starter 5.7g

I am generating the .vcd file during post PAR simulation and then
using this file for xpower along with .ncd and .pcf files. I get a lot
of warnings like:

WARNING:power:763 - Only 41% of the design signals toggle.

WARNING:power:216 - VCDFile(564214): $dumpoff command encountered, all
simulation data after this will be ignored.
INFO:power:555 - Estimate is reasonable based on analysis of the
design, user
WARNING:power:91 - Can't change frequency of net clk to 166.67Mhz.
WARNING:power:91 - Can't change frequency of net clk to 165.83Mhz.
WARNING:power:91 - Can't change frequency of net clk_BUFGP/IBUFG to
165.83Mhz.
WARNING:power:91 - Can't change frequency of net clk_BUFGP to
165.83Mhz.
WARNING:power:91 - Can't change frequency of net GLOBAL_LOGIC0 to
0.83Mhz.
WARNING:power:91 - Can't change frequency of net ce_IBUF to 0.83Mhz.
WARNING:power:91 - Can't change frequency of net clk to 165.83Mhz.
WARNING:power:91 - Can't change frequency of net clk_BUFGP/IBUFG to
165.83Mhz.
parsing completed in: 0 secs
WARNING:power:91 - Can't change frequency of net ce_IBUF to 0.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in4_0_IBUF to
0.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in4_1_IBUF to
0.83Mhz.
.......
WARNING:power:91 - Can't change frequency of net gateway_in4_8_IBUF to
0.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in8_IBUF to
25.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in10_IBUF to
26.67Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in9_IBUF to
25.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in5_0_IBUF to
1.67Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in5_1_IBUF to
0.83Mhz.
.......
..
WARNING:power:91 - Can't change frequency of net gateway_in3_3_IBUF to
26.67Mhz.
WARNING:power:763 - Only 42% of the design signals toggle.
WARNING:power:763 - Only 42% of the design signals toggle.

the report summary is
Power summary: I(mA) P(mW)
----------------------------------------------------------------
Total estimated power consumption: 553
---
Vccint 1.50V: 146 220
Vccaux 3.30V: 100 330
Vcco33 3.30V: 1 3
---
Clocks: 0 0
Inputs: 3 5
Logic: 61 91
Outputs:
Vcco33 0 0
Signals: 17 26
---
Quiescent Vccint 1.50V: 65 98
Quiescent Vccaux 3.30V: 100 330
Quiescent Vcco33 3.30V: 1 3
Startup Vccint 1.5V: 200
Startup Vccaux 3.3V: 100
Startup Vcco33 3.3V: 50
---

My Questions:
- How come I get clock power zero? In another smaller testdesign of
counters, I do get some power although logic power in that case is
very less.
- The activity rate for clock nets is zero. How?
- I get the correct simulation but the power results seem incorrect.
- Whats the meaningof such warnings?

--
Mukesh
 
Mukesh,

Try running 'clean up project files' from ISE then delete any .XML
files that may be remaining in that project directory. The .XML file
contains toggle and frequency data and can conflict with the VCD
simulation file if they don't happen to target the same device. (For
example, you target a Spartan-IIe then save the settings file and then
retarget to Virtex-II and accidentally load the .XML file for the
Spartan-IIe design)

If that doesn't help, send the design into Xilinx for analysis. They
can take a look at it and let you know what the problem is.
Regards,
Arthur
 
Hi Mukesh,

Mukesh Chugh wrote:

Hi,

I am facing following issues when using Xpower to calculate the
dynamic power for my design:

Tools being used:
Xilinx ISE 6.2, Xpower 6.2.03i
ModelSim XE II/ Starter 5.7g

I am generating the .vcd file during post PAR simulation and then
using this file for xpower along with .ncd and .pcf files. I get a lot
of warnings like:

WARNING:power:763 - Only 41% of the design signals toggle.

WARNING:power:216 - VCDFile(564214): $dumpoff command encountered, all
simulation data after this will be ignored.
INFO:power:555 - Estimate is reasonable based on analysis of the
design, user
WARNING:power:91 - Can't change frequency of net clk to 166.67Mhz.
WARNING:power:91 - Can't change frequency of net clk to 165.83Mhz.
WARNING:power:91 - Can't change frequency of net clk_BUFGP/IBUFG to
165.83Mhz.
WARNING:power:91 - Can't change frequency of net clk_BUFGP to
165.83Mhz.
WARNING:power:91 - Can't change frequency of net GLOBAL_LOGIC0 to
0.83Mhz.
WARNING:power:91 - Can't change frequency of net ce_IBUF to 0.83Mhz.
WARNING:power:91 - Can't change frequency of net clk to 165.83Mhz.
WARNING:power:91 - Can't change frequency of net clk_BUFGP/IBUFG to
165.83Mhz.
parsing completed in: 0 secs
WARNING:power:91 - Can't change frequency of net ce_IBUF to 0.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in4_0_IBUF to
0.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in4_1_IBUF to
0.83Mhz.
......
WARNING:power:91 - Can't change frequency of net gateway_in4_8_IBUF to
0.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in8_IBUF to
25.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in10_IBUF to
26.67Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in9_IBUF to
25.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in5_0_IBUF to
1.67Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in5_1_IBUF to
0.83Mhz.
......
.
WARNING:power:91 - Can't change frequency of net gateway_in3_3_IBUF to
26.67Mhz.
WARNING:power:763 - Only 42% of the design signals toggle.
WARNING:power:763 - Only 42% of the design signals toggle.

the report summary is
Power summary: I(mA) P(mW)
----------------------------------------------------------------
Total estimated power consumption: 553
---
Vccint 1.50V: 146 220
Vccaux 3.30V: 100 330
Vcco33 3.30V: 1 3
---
Clocks: 0 0
Inputs: 3 5
Logic: 61 91
Outputs:
Vcco33 0 0
Signals: 17 26
---
Quiescent Vccint 1.50V: 65 98
Quiescent Vccaux 3.30V: 100 330
Quiescent Vcco33 3.30V: 1 3
Startup Vccint 1.5V: 200
Startup Vccaux 3.3V: 100
Startup Vcco33 3.3V: 50
---

My Questions:
- How come I get clock power zero? In another smaller testdesign of
counters, I do get some power although logic power in that case is
very less.
- The activity rate for clock nets is zero. How?
- I get the correct simulation but the power results seem incorrect.
- Whats the meaningof such warnings?

--
Mukesh
This too looks similar to the other problem which we've been working on.
You could you to zip up the NCD, VCD & PCF files and send them to me. (Or
again wait on the service pack next week.) It would also be helpful to
know if the messages you've provided occured in the sequence indicated
above.

Brendan
 
"Arthur" <arthuryang42spam@yahoo.com> wrote in message news:<chlf2p$rdm@odak26.prod.google.com>...
Mukesh,

Try running 'clean up project files' from ISE then delete any .XML
files that may be remaining in that project directory. The .XML file
contains toggle and frequency data and can conflict with the VCD
simulation file if they don't happen to target the same device. (For
example, you target a Spartan-IIe then save the settings file and then
retarget to Virtex-II and accidentally load the .XML file for the
Spartan-IIe design)

If that doesn't help, send the design into Xilinx for analysis. They
can take a look at it and let you know what the problem is.
Regards,
Arthur
Hi Arthur,

Thanks for the response,
I tried cleaning up as per your suggestion but that didnt help.

--
Mukesh
 
On Saturday, September 4, 2004 3:43:01 AM UTC+5:30, Mukesh Chugh wrote:
Hi,

I am facing following issues when using Xpower to calculate the
dynamic power for my design:

Tools being used:
Xilinx ISE 6.2, Xpower 6.2.03i
ModelSim XE II/ Starter 5.7g

I am generating the .vcd file during post PAR simulation and then
using this file for xpower along with .ncd and .pcf files. I get a lot
of warnings like:

WARNING:power:763 - Only 41% of the design signals toggle.

WARNING:power:216 - VCDFile(564214): $dumpoff command encountered, all
simulation data after this will be ignored.
INFO:power:555 - Estimate is reasonable based on analysis of the
design, user
WARNING:power:91 - Can't change frequency of net clk to 166.67Mhz.
WARNING:power:91 - Can't change frequency of net clk to 165.83Mhz.
WARNING:power:91 - Can't change frequency of net clk_BUFGP/IBUFG to
165.83Mhz.
WARNING:power:91 - Can't change frequency of net clk_BUFGP to
165.83Mhz.
WARNING:power:91 - Can't change frequency of net GLOBAL_LOGIC0 to
0.83Mhz.
WARNING:power:91 - Can't change frequency of net ce_IBUF to 0.83Mhz.
WARNING:power:91 - Can't change frequency of net clk to 165.83Mhz.
WARNING:power:91 - Can't change frequency of net clk_BUFGP/IBUFG to
165.83Mhz.
parsing completed in: 0 secs
WARNING:power:91 - Can't change frequency of net ce_IBUF to 0.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in4_0_IBUF to
0.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in4_1_IBUF to
0.83Mhz.
......
WARNING:power:91 - Can't change frequency of net gateway_in4_8_IBUF to
0.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in8_IBUF to
25.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in10_IBUF to
26.67Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in9_IBUF to
25.83Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in5_0_IBUF to
1.67Mhz.
WARNING:power:91 - Can't change frequency of net gateway_in5_1_IBUF to
0.83Mhz.
......
.
WARNING:power:91 - Can't change frequency of net gateway_in3_3_IBUF to
26.67Mhz.
WARNING:power:763 - Only 42% of the design signals toggle.
WARNING:power:763 - Only 42% of the design signals toggle.

the report summary is
Power summary: I(mA) P(mW)
----------------------------------------------------------------
Total estimated power consumption: 553
---
Vccint 1.50V: 146 220
Vccaux 3.30V: 100 330
Vcco33 3.30V: 1 3
---
Clocks: 0 0
Inputs: 3 5
Logic: 61 91
Outputs:
Vcco33 0 0
Signals: 17 26
---
Quiescent Vccint 1.50V: 65 98
Quiescent Vccaux 3.30V: 100 330
Quiescent Vcco33 3.30V: 1 3
Startup Vccint 1.5V: 200
Startup Vccaux 3.3V: 100
Startup Vcco33 3.3V: 50
---

My Questions:
- How come I get clock power zero? In another smaller testdesign of
counters, I do get some power although logic power in that case is
very less.
- The activity rate for clock nets is zero. How?
- I get the correct simulation but the power results seem incorrect.
- Whats the meaningof such warnings?

--
Mukesh

Hi,
I am getting the same error. The error is
WARNING:power:91 - Can't change frequency of net log/result_cmp_eq0002 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<10>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<11>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<12>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<13>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<14>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<15>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<16>7 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<1>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<2>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<3>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<4>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<5>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<6>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<7>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<8>11 to 1.00Mhz.
WARNING:power:91 - Can't change frequency of net log/result_mux0000<9>11 to 1.00Mhz.
Running Vector-less Activity Propagation
.......
Finished Running Vector-less Activity Propagation
Finished Running Vector-less Activity Propagation 0 secs

The target device is Spartan 3E and ISE 14.2
I am unable to debug the error.
Please give your input.
 
In article <FuyIu.16233$Ek5.1950@fx17.fr7>,
Brian Drummond <brian3@shapes.demon.co.uk> wrote:
On Wed, 05 Feb 2014 14:24:35 -0600, Jon Elson wrote:

roopa.patavardhan@gmail.com wrote:

On Saturday, September 4, 2004 3:43:01 AM UTC+5:30, Mukesh Chugh wrote:
Hi,

I am facing following issues when using Xpower to calculate the
dynamic power for my design:

Tools being used:
Xilinx ISE 6.2, Xpower 6.2.03i ModelSim XE II/ Starter 5.7g
Are you really using software that OLD? I tend to use older software,
but recently moved up to version 14. I'm surprised that software even
supports Spartan 3E.

Jon

No, roopa is using ISE14. The post he's replying to, however, is 10 years
old...

I've noticed a sudden uptick in these kinds of posts lately - i.e. replying to
5, 10 year old posts. Caught myself answering one on the Xilinx forums before
I noticed how old the thread was...

Think I even saw a 17 year old usenet thread replied to as well.

Must be senior project time, one wonders?

Just kinds of funny to see.

--Mark
 
roopa.patavardhan@gmail.com wrote:

On Saturday, September 4, 2004 3:43:01 AM UTC+5:30, Mukesh Chugh wrote:
Hi,

I am facing following issues when using Xpower to calculate the
dynamic power for my design:

Tools being used:
Xilinx ISE 6.2, Xpower 6.2.03i
ModelSim XE II/ Starter 5.7g
Are you really using software that OLD? I tend to use older software,
but recently moved up to version 14. I'm surprised that software
even supports Spartan 3E.

Jon
 
On Wed, 05 Feb 2014 14:24:35 -0600, Jon Elson wrote:

roopa.patavardhan@gmail.com wrote:

On Saturday, September 4, 2004 3:43:01 AM UTC+5:30, Mukesh Chugh wrote:
Hi,

I am facing following issues when using Xpower to calculate the
dynamic power for my design:

Tools being used:
Xilinx ISE 6.2, Xpower 6.2.03i ModelSim XE II/ Starter 5.7g
Are you really using software that OLD? I tend to use older software,
but recently moved up to version 14. I'm surprised that software even
supports Spartan 3E.

Jon

No, roopa is using ISE14. The post he's replying to, however, is 10 years
old...

- Brian
 
On 2/5/2014 3:08 PM, Mark Curry wrote:
In article <FuyIu.16233$Ek5.1950@fx17.fr7>,
Brian Drummond <brian3@shapes.demon.co.uk> wrote:
On Wed, 05 Feb 2014 14:24:35 -0600, Jon Elson wrote:

roopa.patavardhan@gmail.com wrote:

On Saturday, September 4, 2004 3:43:01 AM UTC+5:30, Mukesh Chugh wrote:
Hi,

I am facing following issues when using Xpower to calculate the
dynamic power for my design:

Tools being used:
Xilinx ISE 6.2, Xpower 6.2.03i ModelSim XE II/ Starter 5.7g
Are you really using software that OLD? I tend to use older software,
but recently moved up to version 14. I'm surprised that software even
supports Spartan 3E.

Jon

No, roopa is using ISE14. The post he's replying to, however, is 10 years
old...

I've noticed a sudden uptick in these kinds of posts lately - i.e. replying to
5, 10 year old posts. Caught myself answering one on the Xilinx forums before
I noticed how old the thread was...

Think I even saw a 17 year old usenet thread replied to as well.

Must be senior project time, one wonders?

Just kinds of funny to see.

--Mark

I was going to write something nasty about Google. But I erased it.

Rob.
 

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