xilinx SW state machines enumeration

[Moti Cohen]

Hi all,

I'm cuurently working on a xilinx spartan 2e design for debug I'm
using the chipscope pro LA.
the problem is as follows: I'm using the chipscope pro for looking at
the logic lines (bus) that define the "state" of the state machine in
order to determine the present state of the machine at a given time.
but the chipscope is giving me the binary (or oct, hex etc.) value of
the bus.
when I'm declaring the state machine in VHDL I'm giving each state a
name (the synt' does the enumeration automatically) so I do not know
what is the corresponding bus value for each state.
I'm pretty sure that the Xilinx synthisizer generates this kind of
data but I dont know where to find it and so is their FAE

for example:
if I declare a simple state machine with the follwoing states:

type state_type is (idle , first , second , last)

I would like to get a reference data such as:

idle = 00
first = 01
second = 10
last = 11

that would be very helpfull when debugging large state machines with
chipscope.
So if anyone knows where to find it (if possible) I would realy
appreciate it.

thanks in advance, Moti.