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water9580@yahoo.com
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There is only 8 bit interface wrapper(pcie_gt_wrapper.v) from Xilinx
PCI-Express Endpoint Block IP. it means that it needs 250MHz clk.In
general,it is impossible to achieve 250Mhz clk with large design.So,we
need 16bit interface wrapper so that the clk can be reduced 125Mhz. it
is very easy to implement.is there avaliable 16bit wrapper?
PCI-Express Endpoint Block IP. it means that it needs 250MHz clk.In
general,it is impossible to achieve 250Mhz clk with large design.So,we
need 16bit interface wrapper so that the clk can be reduced 125Mhz. it
is very easy to implement.is there avaliable 16bit wrapper?