Xilinx' partition flow in ISE12.1

[Sean Durkin]

Hi *,

has anyone had any success with the "new" partion flow in ISE12.1?

I've been fiddling around with this for a few hours, but whatever I try,
the design fails to even finish routing on the first pass as soon as I
enable partitions.

The error messages vary, mostly it's complaining about hundreds of
unroutable nets and just quits.

I've read ug748, which mentions several prerequisites that need to be
met, all of which I believe I do meet. One that is not mentioned in the
documentation is that you need to set "keep_hierarchy" to YES during
synthesis, or it won't even find the modules you want to declare as
partitions. This at least seems kind of "logical", but still it should
be in the documentation...

I remember in earlier ISE versions they mentioned that the partition
flow had problems with GENERATE statements and GENERICs, both of which I
do use extensively. Could that be the problem?

Success or failure stories, anyone?

cu,
Sean

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Replace "MONTH" with the three-letter abbreviation of the current month
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[Kate Kelley]

Hey Sean,

Sorry for the late post and my guess is you have either given up or figure
out how to do this. Unroutes should not be happening by just addin
Partitions. If you want to try again, you might want to look at the numbe
of INFO and WARNING messages about constants on inputs and/or outputs an
also the number of unconnected outputs.

The goal for Partitions is to keep the implementation results regardless o
changes outside of the Partition. For that reason, we do not optimize an
constants or unusued outputs across the Partition boundary. Often, this ca
cause more logic resulting in lower QoR. Sometimes this can caus
unroutes. We are looking at changing this in the future.

If you don't think this is the issue, I would really like to see the desig
so we can improve our flow. The best way to do this is to file a webcas
so we can look at it.

The best documentation for the 12.1 flow is the HD Methodology Guide. I
is located a
http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_1/Hierarchical_Design_Methodology_Guide.pdf.

Thanks,
Kate



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