Xilinx ISE : type real

[charsi]

i'm using Xilinx ISE 6.3i...i'm required to calculate logarithm in my
design...Xilinx wont support type real.

Is there any cure for this..i intend to use Xilinx only.

plz help...thanks

 

[Alain]

Hi,

Which kind log do you want to implement ? Log2, for instance easy to
implement for integer.

function Log2(input : integer) return integer is
variable n : integer;
variable logn : integer;
begin
n := 1;
for i in 0 to 31 loop
logn := i;
exit when (n >= input);
n := n * 2;
end loop;
return logn;
end;


"charsi" <gupta_anshu@nospam.rediffmail.coooom> a écrit dans le message de
news: 40074f5037b6cee8f57fca3db2ee05b5@localhost.talkaboutprogramming.com...

i'm using Xilinx ISE 6.3i...i'm required to calculate logarithm in my
design...Xilinx wont support type real.

Is there any cure for this..i intend to use Xilinx only.

plz help...thanks

 

[David Bishop]

charsi wrote:

i'm using Xilinx ISE 6.3i...i'm required to calculate logarithm in my
design...Xilinx wont support type real.

Is there any cure for this..i intend to use Xilinx only.

First, according to 1076.6 the type "real" is not synthesisizable.

I think that the function you really want is in the new "numeric_std"
package.

Download this file:
http://www.eda.org/vhdl-200x/vhdl-200x-ft/packages/additions_11.tar.Z

Compile the file "numeric_std_additions.vhd" (this are just the new
functions, not the whole thing)

Use this function:

signal XXX : UNSIGNED (16 downto 0);
signal log_base_2 : integer;

log_base_2 := find_msb (XXX, '1');

This package will synthesize with XST, the fixed point and floating
point packages will not until Xilinx 8.0 because they use a negative index.

 

[Mohammed A khader]

Hi,

Real Numbers are not synthesizable . Consider using fix point format
..

-- Mohammed A Khader.